Datasheet

LT3032 Series
18
3032fd
Stability and Input Capacitance
Low ESR, ceramic input bypass capacitors are acceptable
for applications without long input leads. However, applica-
tions connecting a power supply to an LT3032’s circuit’s
INP/INN and GND pins with long input wires combined
with low ESR, ceramic input capacitors are prone to voltage
spikes, reliability concerns and application-specifi c board
oscillations. The input wire inductance found in many
battery-powered applications, combined with the low ESR
ceramic input capacitor, forms a high-Q LC resonant tank
circuit. In some instances this resonant frequency beats
against the output current dependent LDO bandwidth and
interferes with proper operation. Simple circuit modifi ca-
tions/solutions are then required. This behavior is not
indicative of LT3032 instability, but is a common ceramic
input bypass capacitor application issue.
The self-inductance, or isolated inductance, of a wire is
directly proportional to its length. Wire diameter is not a
major factor on its self-inductance. For example, the self-
inductance of a 2-AWG isolated wire (diameter = 0.26”) is
about half the self-inductance of a 30-AWG wire (diameter
= 0.01”). One foot of 30-AWG wire has about 465nH of
self-inductance.
One of two ways reduces a wire’s self-inductance. One
method divides the current fl owing towards the LT3032
between two parallel conductors. In this case, the farther
apart the wires are from each other, the more the self-
inductance is reduced; up to a 50% reduction when placed
a few inches apart. Splitting the wires basically connects
two equal inductors in parallel, but placing them in close
proximity gives the wires mutual inductance adding to
the self-inductance. The second and most effective way
to reduce overall inductance is to place both forward and
return current conductors (the input and GND wires) in
very close proximity. Two 30-AWG wires separated by only
0.02”, used as forward– and return– current conductors,
reduce the overall self-inductance to approximately one-
fi fth that of a single isolated wire.
APPLICATIONS INFORMATION
DC BIAS VOLTAGE (V)
CHANGE IN VALUE (%)
3032 F03
20
0
–20
–40
–60
–80
–100
0
4
8
10
26
12
14
X5R
Y5V
16
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
Figure 3. Ceramic Capacitor DC Bias Characteristics
TEMPERATURE (°C)
–50
40
20
0
–20
–40
–60
–80
–100
25 75
3032 F04
–25 0
50 100 125
Y5V
CHANGE IN VALUE (%)
X5R
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
Figure 4. Ceramic Capacitor Temperature Characteristics
OUTPUT SET TO 5V
3032 F05
Figure 5. Noise Resulting From Tapping on a Ceramic Capacitor