Datasheet

LT3011
11
3011f
During normal operation, an internal glitch fi lter will ignore
short transients (<15μs). Longer transients below the 90%
threshold will reset the JK fl ip-fl op. This ip-fl op ensures
that the capacitor on the C
T
pin is quickly discharged all
the way to the V
CT(LOW)
threshold before restarting the
time delay. This provides a consistent time delay after the
ADJ pin is within 10% of the regulated voltage before the
PWRGD pin switches to high impedance.
Thermal Considerations
The power handling capability of the device will be limited by
the maximum rated junction temperature (125°C, LT3011E/
LT3011I or 150°C, LT3011H). The power dissipated by the
device will be made up of two components:
1. Output current multiplied by the input/output voltage
differential: I
OUT
• (V
IN
– V
OUT
) and,
2. GND pin current multiplied by the input voltage:
I
GND
• V
IN
The GND pin current is found by examining the GND pin
current curves in the Typical Performance Characteristics
section. Power dissipation will be equal to the sum of the
two components listed above.
The LT3011 series regulators have internal thermal limiting
designed to protect the device during overload conditions.
For continuous normal conditions, the maximum junction
temperature rating of 125°C (LT3011E/ LT3011I) or 150°C
(LT3011H) must not be exceeded. It is important to give
careful consideration to all sources of thermal resistance
from junction to ambient. Additional heat sources mounted
nearby must also be considered.
QJ
K
V
REF
• 90%
ADJ
V
CT(LOW)
z0.1V
V
CT(HIGH)
– V
BE
(z1.1V)
I
CT
3μA
C
T
3011 F04
+
+
PWRGD
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
The following table lists thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with one ounce
copper.
Table 1. MSOP Measured Thermal Resistance
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)TOPSIDE BACKSIDE
2500 sq mm 2500 sq mm 2500 sq mm 52°C/W
1000 sq mm 2500 sq mm 2500 sq mm 54°C/W
225 sq mm 2500 sq mm 2500 sq mm 58°C/W
100 sq mm 2500 sq mm 2500 sq mm 64°C/W
Table 2. DFN Measured Thermal Resistance
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)TOPSIDE BACKSIDE
2500 sq mm 2500 sq mm 2500 sq mm 52°C/W
1000 sq mm 2500 sq mm 2500 sq mm 54°C/W
225 sq mm 2500 sq mm 2500 sq mm 58°C/W
100 sq mm 2500 sq mm 2500 sq mm 64°C/W
The thermal resistance junction-to-case (θ
JC
), measured
at the Exposed Pad on the back of the die, is 16°C/W.
Continuous operation at large input/output voltage dif-
ferentials and maximum load current is not practical due
to thermal limitations. Transient operation at high input/
output differentials is possible. The approximate thermal
time-constant for a 2500sq mm 3/32" FR-4 board, with
maximum topside and backside area for one ounce cop-
per, is three seconds. This time-constant will increase as
more thermal mass is added (i.e., vias, larger board and
other components).
For an application with transient high power peaks, average
power dissipation can be used for junction temperature
calculations as long as the pulse period is signifi cantly less
than the thermal time constant of the device and board.
Figure 4. PWRGD Circuit Block Diagram
APPLICATIONS INFORMATION