Datasheet

18
LT1995
1995fb
APPLICATIO S I FOR ATIO
WUUU
and power dissipation (P
D
) as follows for a nominal PCB
layout:
T
J
= T
A
+ (P
D
• θ
JA
)
For example, in order to maintain a maximum junction
temperature of 150°C at 85°C ambient in an MS10 pack-
age, the power must be limited to 0.4W. It is important to
note that when operating at ±15V supplies, the quiescent
current alone will typically account for 0.24W, so careful
thermal management may be required if high load cur-
rents and high supply voltages are involved. By additional
copper area contact to the supply pins or effective thermal
coupling to extended ground plane(s), the thermal imped-
ance can be reduced to 130°C/W in the MS10 package. A
substantial reduction in thermal impedance of the DD10
package down to about 50°C/W can be achieved by
connecting the Exposed Pad on the bottom of the package
to a large PC board metal area which is either open-
circuited or connected to V
S
–
.
M4
M2
M1
P1
P2
P4
8
9
10
1
2
3
V
OUT
10nF
47Ω
V
IN
+V
–V
6
4
CONFIGURATION EXAMPLE:
G = 1.14
5
1995 F09
7
LT1995
REF
Figure 9. Optional Frequency Compensation
Network for (1 ≤ G ≤ 2)
Frequency Compensation
The LT1995 comfortably drives heavy resistive loads such
as back-terminated cables and provides nicely damped
responses for all gain configurations when doing so.
Small capacitances are included in the on-chip resistor
network to optimize bandwidth in the basic difference gain
configurations of Figure 1. For the noninverting configura-
tions of Figure 2, where the gain parameter G is 2 or less,
significant overshoot can occur when driving light loads.
For these low gain cases, providing an RC output network
as shown in Figure 9 to create an artificial load at high
frequency will assure good damping behavior.
Figure 10. Step Response of Circuit in Figure 9