Datasheet

LT1993-10
10
199310fb
+OUTFILTERED, –OUTFILTERED (Pins 6, 7): Filtered
Outputs. These pins add a series 25Ω resistor from the
unfi ltered outputs and three 12pF capacitors. Each output
has 12pF to V
EE
, plus an additional 12pF between each pin
(See the Block Diagram). This fi lter has a –3dB bandwidth
of 175MHz.
ENABLE (Pin 11): This pin is a TTL logic input referenced
to the V
EEC
pin. If low, the LT1993-10 is enabled and draws
typically 100mA of supply current. If high, the LT1993-10
is disabled and draws typically 250µA.
–INA, –INB (Pins 14, 13): Negative Inputs. These pins are
normally tied together. These inputs may be DC- or AC-
coupled. If the inputs are AC-coupled, they will self-bias
to the voltage applied to the V
OCM
pin.
+INA, +INB (Pins 16, 15): Positive Inputs. These pins are
normally tied together. These inputs may be DC- or AC-
coupled. If the inputs are AC-coupled, they will self-bias
to the voltage applied to the V
OCM
pin.
Exposed Pad (Pin 17): Tie the pad to V
EEC
(Pin 12). If split
supplies are used, DO NOT tie the pad to ground.
PI FU CTIO S
UUU
BLOCK DIAGRA
W
+
–
14
–
INA
5
+OUT
199310 BD
3
V
CCA
10
V
CCB
1
V
CCC
11
ENABLE
13
–
INB
12pF
V
CCA
A
V
EEA
V
EEA
100Ω
100Ω
500Ω
500Ω
25Ω
500Ω
6
+OUTFILTERED
–
+
16
+INA
8
–OUT
15
+INB
V
CCB
B
V
EEB
V
EEB
100Ω
100Ω
25Ω
500Ω
12pF
12pF
7
–OUTFILTERED
12
V
EEC
9
V
EEB
4
V
EEA
+
–
V
EEC
C
V
CCC
2
V
OCM
BIAS