Datasheet
15
LT1962 Series
APPLICATIO S I FOR ATIO
WUUU
from the 1.22V reference when the output is forced to 20V.
The top resistor of the resistor divider must be chosen to
limit the current into the ADJ pin to less than 5mA when the
ADJ pin is at 7V. The 13V difference between OUT and ADJ
pin divided by the 5mA maximum current into the ADJ pin
yields a minimum top resistor value of 2.6k.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage or is left open
circuit. Current flow back into the output will follow the
curve shown in Figure 7.
When the IN pin of the LT1962 is forced below the OUT pin
or the OUT pin is pulled above the IN pin, input current will
typically drop to less than 2µA. This can happen if the input
of the device is connected to a discharged (low voltage)
battery and the output is held up by either a backup battery
OUTPUT VOLTAGE (V)
01
REVERSE OUTPUT CURRENT (µA)
30
40
50
60
70
80
90
100
897
1962 F07
20
10
0
23
4
6
5
10
LT1962
LT1962-5
T
J
= 25°C
V
IN
= 0V
CURRENT FLOWS
INTO OUTPUT PIN
V
OUT
= V
ADJ
(LT1962)
LT1962-1.5
LT1962-1.8
LT1962-2.5
LT1962-3
LT1962-3.3
Figure 7. Reverse Output Current
or a second regulator circuit. The state of the SHDN pin will
have no effect on the reverse output current when the
output is pulled above the input.
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
MSOP (MS8) 1100
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
0.021
± 0.006
(0.53 ± 0.015)
0
° – 6° TYP
SEATING
PLANE
0.007
(0.18)
0.043
(1.10)
MAX
0.009 – 0.015
(0.22 – 0.38)
0.005
± 0.002
(0.13 ± 0.05)
0.034
(0.86)
REF
0.0256
(0.65)
BSC
12
3
4
0.193 ± 0.006
(4.90 ± 0.15)
8
7
6
5
0.118 ± 0.004*
(3.00 ± 0.102)
0.118 ± 0.004**
(3.00 ± 0.102)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.