Datasheet

23
LT1956/LT1956-5
1956f
APPLICATIO S I FOR ATIO
WUUU
current via the V
C
pin to maintain a constant dv/dt at the
output. Output rise time is controlled by the current
through C
SS
defined by R4 and Q1’s V
BE
. Once the output
is in regulation, Q1 turns off and the circuit operates
normally. R3 is transient protection for the base of Q1.
RiseTime
RC V
V
SS OUT
BE
=
()( )( )
4
Using the values shown in Figure 10,
Rise Time ms=
()( )
()
=
47 10 15 10 5
07
5
39
••
.
–
The ramp is linear and rise times in the order of 100ms are
possible. Since the circuit is voltage controlled, the ramp
rate is unaffected by load characteristics and maximum
output current is unchanged. Variants of this circuit can be
used for sequencing multiple regulator outputs.
DUAL POLARITY OUTPUT CONVERTER
The circuit in Figure 14a generates both positive and
negative 5V outputs with all components under 3mm
height. The topology for the 5V output is a standard buck
converter. The –5V output uses a second inductor L2,
diode D3 and output capacitor C6. The capacitor C4
5V, 1A
REMOVABLE
INPUT
C2
0.1µF
C
F
220pF
R
C
2.2k
R3
54k
D1
10MQ060N
1956 F12
C3
2.2µF
D3
10MQ060N
MMSD914TI
L1
18µH
C
C
0.022µF
C1
100µF
10V
ALTERNATE
SUPPLY
R4
25k
R1
15.4k
R2
4.99k
BOOST
V
IN
LT1956
SHDN
SYNC
SW
BIAS
FB
V
C
GND
+
Figure 12. Dual Source Supply with 25µA Reverse Leakage
OUTPUT
5V
1A
INPUT
12V
1766 F13
C2
0.1µF
C1
100µF
C
SS
15nF
D1
C3
2.2µF
CERAMIC
D2
MMSD914TI
L1
18µH
R1
15.4k
R3
2k
R2
4.99k
R4
47k
Q1
R
C
2.2k
C
F
220pF
C
C
0.022µF
BOOST BIAS
V
IN
LT1956
SHDN
SYNC
SW
FB
V
C
GND
+
Figure 13. Buck Converter with Adjustable Soft-Start