Datasheet

LT1913
18
1913f
to prevent this overshoot. Figure 9 shows the waveforms
that result when an LT1913 circuit is connected to a 24V
supply through six feet of 24-gauge twisted pair. The
fi rst plot is the response with a 4.7µF ceramic capacitor
at the input. The input voltage rings as high as 50V and
the input current peaks at 26A. A good solution is shown
in Figure 9b. A 0.7
resistor is added in series with the
input to eliminate the voltage overshoot (it also reduces
the peak input current). A 0.1µF capacitor improves high
frequency fi ltering. For high input voltages its impact on
effi ciency is minor, reducing effi ciency by 1.5 percent for
a 5V output at full load operating from 24V.
Figure 9. A Well Chosen Input Network Prevents Input Voltage Overshoot and
Ensures Reliable Operation when the LT1913 is Connected to a Live Supply
+
LT1913
4.7µF
V
IN
20V/DIV
I
IN
10A/DIV
20µs/DIV
V
IN
CLOSING SWITCH
SIMULATES HOT PLUG
I
IN
(9a)
(9b)
LOW
IMPEDANCE
ENERGIZED
24V SUPPLY
STRAY
INDUCTANCE
DUE TO 6 FEET
(2 METERS) OF
TWISTED PAIR
+
LT1913
4.7µF0.1µF
0.7
V
IN
20V/DIV
I
IN
10A/DIV
20µs/DIV
DANGER
RINGING V
IN
MAY EXCEED
ABSOLUTE MAXIMUM RATING
(9c)
+
LT1913
4.7µF
22µF
35V
AI.EI.
1913 F09
V
IN
20V/DIV
I
IN
10A/DIV
20µs/DIV
+
APPLICATIONS INFORMATION
High Temperature Considerations
The PCB must provide heat sinking to keep the LT1913
cool. The Exposed Pad on the bottom of the package must
be soldered to a ground plane. This ground should be tied
to large copper layers below with thermal vias; these lay-
ers will spread the heat dissipated by the LT1913. Place
additional vias can reduce thermal resistance further. With
these steps, the thermal resistance from die (or junction)
to ambient can be reduced to
JA
= 35°C/W or less. With
100 LFPM airfl ow, this resistance can fall by another 25%.
Further increases in airfl ow will lead to lower thermal re-