Datasheet

LT1913
17
1913f
the output is held high, then parasitic diodes inside the
LT1913 can pull large currents from the output through
the SW pin and the V
IN
pin. Figure 7 shows a circuit that
will run only when the input voltage is present and that
protects against a shorted or reversed input.
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board layout. Figure 8 shows
the recommended component placement with trace,
ground plane and via locations. Note that large, switched
currents fl ow in the LT1913’s V
IN
and SW pins, the catch
diode (D1) and the input capacitor (C1). The loop formed
by these components should be as small as possible. These
components, along with the inductor and output capacitor,
should be placed on the same side of the circuit board,
and their connections should be made on that layer. Place
a local, unbroken ground plane below these components.
The SW and BOOST nodes should be as small as possible.
Finally, keep the FB and V
C
nodes small so that the ground
traces will shield them from the SW and BOOST nodes.
Figure 7. Diode D4 Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output. It Also
Protects the Circuit from a Reversed Input. The LT1913
Runs Only When the Input is Present
V
IN
BOOST
GND FB
RUN/SS
V
C
SW
D4
MBRS140
V
IN
LT1913
1913 F07
V
OUT
BACKUP
VIAS TO LOCAL GROUND PLANE
VIAS TO V
OUT
VIAS TO RUN/SS
VIAS TO PG
VIAS TO V
IN
OUTLINE OF LOCAL
GROUND PLANE
1913 F08
L1
C2
R
RT
R
PG
R
C
R2
R1
C
C
V
OUT
D1
C1
GND
VIAS TO SYNC
Figure 8. A Good PCB Layout Ensures Proper, Low EMI Operation
APPLICATIONS INFORMATION
The Exposed Pad on the bottom of the package must be
soldered to ground so that the pad acts as a heat sink. To
keep thermal resistance low, extend the ground plane as
much as possible, and add thermal vias under and near
the LT1913 to additional ground planes within the circuit
board and on the bottom side.
Hot Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LT1913 circuits. However, these capaci-
tors can cause problems if the LT1913 is plugged into a
live supply (see Linear Technology Application Note 88 for
a complete discussion). The low loss ceramic capacitor,
combined with stray inductance in series with the power
source, forms an under damped tank circuit, and the
voltage at the V
IN
pin of the LT1913 can ring to twice the
nominal input voltage, possibly exceeding the LT1913’s
rating and damaging the part. If the input supply is poorly
controlled or the user will be plugging the LT1913 into an
energized supply, the input network should be designed