Datasheet

LT1767/LT1767-1.8/
LT1767-2.5/LT1767-3.3/LT1767-5
8
1767fb
For more information www.linear.com/LT1767
applicaTions inForMaTion
FB RESISTOR NETWORK
If an output voltage of 1.8V, 2.5V, 3.3V or 5V is required, the
respective fixed option part, -1.8, -2.5, -3.3 or -5, should be
used. The FB pin is tied directly to the output; the necessary
resistive divider is already included on the part. For other
voltage outputs, the adjustable part should be used and an
external resistor divider added. The suggested resistor (R2)
from FB to ground is 10k. This reduces the contribution of
FB input bias current to output voltage to less than 0.25%.
The formula for the resistor (R1) from V
OUT
to FB is:
R1=
R2 V
OUT
−1.2
( )
1.2−R2(0.25µA)
(~0.4V at maximum load). This leads to a minimum input
voltage of:
V
IN MIN
( )
=
V
OUT
+ V
D
DC
MAX
– V
D
+ V
SW
with DC
MAX
= 0.80 at output current below 0.5A, and
DC
MAX
= 0.75 at higher loads. The maximum duty cycle
decreases when the LT1767 is synchronized to an external
clock; DC
MAX
= 1 – 0.25µs • f
CLK
.
The maximum input voltage is determined by the absolute
maximum ratings of the V
IN
and BOOST pins and by the
minimum duty cycle DC
MIN
= 0.16:
V
IN MAX
( )
=
V
OUT
+ V
D
DC
MIN
– V
D
+ V
SW
For a 12V input, the lowest practical output voltage is
1.8V. Minimum duty cycle will increase when the LT1767
is synchronized; DC
MIN
= 0.11µs • f
CLK
. Note that this is
a restriction on the operating input voltage; the circuit
will tolerate transient inputs up to the absolute maximum
ratings of the V
IN
and BOOST pins, provided the output
is not shorted.
For wider input voltage range, consult the related parts
table on the last page of this data sheet.
INPUT CAPACITOR
Step-down regulators draw current from the input supply in
pulses. The rise and fall times of these pulses are very fast.
The input capacitor is required to reduce the voltage ripple
this causes at the input of LT1767 and force the switching
current into a tight local loop, thereby minimizing EMI. The
RMS ripple current can be calculated from:
I
RIPPLE RMS
( )
=I
OUT
V
OUT
V
IN
− V
OUT
( )
/ V
IN
2
Higher value, lower cost ceramic capacitors are now available
in smaller case sizes. These are ideal for input bypassing
since their high frequency capacitive nature removes most
ripple current rating and turn-on surge problems. At higher
switching frequency, the energy storage requirement of the
Figure 2. Feedback Network
–
+
1.2V
V
SW
V
C
GND
1767 F02
R1
R2
10k
OUTPUT
ERROR
AMPLIFIER
FB
LT1767
+
g
m
INPUT VOLTAGE RANGE
The input voltage range for LT1767 applications depends
on the output voltage, the absolute maximum ratings of
the V
IN
and BOOST pins, and the operating frequency.
The minimum input voltage is determined by either the
LT1767’s minimum operating voltage of 2.73V or by its
maximum duty cycle. The duty cycle is the fraction of
time that the internal switch is on and is determined by
the input and output voltages:
DC =
V
OUT
+ V
D
V
IN
– V
SW
+ V
D
where V
D
is the forward voltage drop of the catch diode
(~0.4V) and V
SW
is the voltage drop of the internal switch
Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.