Datasheet

LT1767/LT1767-1.8/
LT1767-2.5/LT1767-3.3/LT1767-5
15
1767fb
For more information www.linear.com/LT1767
applicaTions inForMaTion
with C
C
. This simple model works well as long as the val-
ue of the inductor is not too high and the loop crossover
frequency
is much lower than the switching frequency.
A phase lead capacitor (C
PL
) across the feedback divider
may improve the transient response. An optional capacitor
(C
F
) in parallel with the compensation may be included.
This capacitor is not part of the loop compensation, but
instead filters noise at the switching frequency, and is
required only if a phase-lead capacitor is used or if the
output capacitor has high ESR.
For output capacitors with specified ESR greater than
~50mΩ, a single capacitor can be used for compensation.
For ceramic output capacitor, include a zero resistor in
the compensation network. Figure 8 shows the transient
response of the circuit on the front page of the data sheet.
When checking loop stability, the circuit should be operated
over the application’s full voltage, current and tempera
-
ture range. Any transient loads should be applied and the
output voltage monitored for a well-damped behavior. See
Application Note 76 for more details.
CONVERTER WITH BACKUP OUTPUT REGULATOR
In systems with a primary and backup supply, for exam
-
ple, a battery powered device with a wall adapter input,
the output of the LT1767 can be held up by the backup
supply with its input disconnected. In this condition, the
SW pin will source current into the V
IN
pin. If the SHDN
pin is held at ground, only the shut down current of 6µA
will be pulled via the SW pin from the second supply.
With the SHDN pin floating, the LT1767 will consume its
quiescent operating current of 1mA. The V
IN
pin will also
source current to any other components connected to the
input line. If this load is greater than 10mA or the input
could be shorted to ground, a series Schottky diode must
be added, as shown in Figure 9. With these safeguards,
the output can be held at voltages up to the V
IN
absolute
maximum rating.
BUCK CONVERTER WITH ADJUSTABLE SOFT-START
Large capacitive loads or high input voltages can cause
high input currents at start-up. Figure 10 shows a circuit
that limits the dv/dt of the output at start-up, controlling
the capacitor charge rate. The buck converter is a typical
configuration with the addition of R3, R4, C
SS
and Q1. As
the output starts to rise, Q1 turns on, regulating switch
current via the V
C
pin to maintain a constant dv/dt at the
output. Output rise time is controlled by the current through
C
SS
defined by R4 and Q1’s V
BE
. Once the output is in
regulation, Q1 turns off and the circuit operates normally.
R3 is transient protection for the base of Q1.
RiseTime =
(R4)(C
SS
)(V
OUT
)
(V
BE
)
Using the values shown in Figure 10,
RiseTime =
(47 • 10
3
)(15 • 10
–9
)(5)
0.7
= 5ms
Figure 7. Model for Loop Response
–
+
1.2V
V
C
LT1767
GND
1767 F07
R1
OUTPUT
ESR
C
F
C
C
R
C
500k
ERROR
AMPLIFIER
FB
R2
C1
CURRENT MODE
POWER STAGE
g
m
= 2.5mho
g
m
=
850µmho
+
CERAMICTANTALUM
C1
C
PL
Figure 8. Oscillograph Shows the Output Voltage
Response to a Load Current Transient from 0.3A to 1A.
The Compensation Network Results in Fast, Damped
Response. (Front Page Schematic, 12V in to 3.3V out)
10µs/DIV
V
OUT
100mV/DIV
1767 F08
Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.