Datasheet

6
LT1767/LT1767-1.8/
LT1767-2.5/LT1767-3.3/LT1767-5
sn1767 1767fas
BLOCK DIAGRAM
W
and output capacitor, then an abrupt 180° shift will occur.
The current fed system will have 90° phase shift at a much
lower frequency, but will not have the additional 90° shift
until well beyond the LC resonant frequency. This makes
it much easier to frequency compensate the feedback loop
and also gives much quicker transient response.
High switch efficiency is attained by using the BOOST pin
to provide a voltage to the switch driver which is higher
than the input voltage, allowing switch to be saturated.
This boosted voltage is generated with an external capaci-
tor and diode. A comparator connected to the shutdown
pin disables the internal regulator, reducing supply
current.
The LT1767 is a constant frequency, current mode buck
converter. This means that there is an internal clock and
two feedback loops that control the duty cycle of the power
switch. In addition to the normal error amplifier, there is a
current sense amplifier that monitors switch current on a
cycle-by-cycle basis. A switch cycle starts with an oscilla-
tor pulse which sets the R
S
flip-flop to turn the switch on.
When switch current reaches a level set by the inverting
input of the comparator, the flip-flop is reset and the
switch turns off. Output voltage control is obtained by
using the output of the error amplifier to set the switch
current trip point. This technique means that the error
amplifier commands current to be delivered to the output
rather than voltage. A voltage fed system will have low
phase shift up to the resonant frequency of the inductor
Figure 1. Block Diagram
+
+
Σ
V
IN
2.5V BIAS
REGULATOR
1.25MHz
OSCILLATOR
V
SW
FB
V
C
GND
1767 F01
SLOPE COMP
0.01
INTERNAL
V
CC
CURRENT
SENSE
AMPLIFIER
VOLTAGE GAIN = 40
SYNC
SHDN
SHUTDOWN
COMPARATOR
CURRENT
COMPARATOR
ERROR
AMPLIFIER
g
m
= 850µMho
BOOST
R
S
FLIP-FLOP
DRIVER
CIRCUITRY
S
R
0.35V
Q1
POWER
SWITCH
PARASITIC DIODES
DO NOT
FORWARD BIAS
1.2V
+
+
1.33V
3µA
7µA
2
8
5
7
1
4
6
3