Datasheet

19
LT1738
1738fa
PACKAGE DESCRIPTIO
U
G Package
20-Lead Plastic SSOP (5.3mm)
(Reference LTC DWG # 05-08-1640)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
APPLICATIO S I FOR ATIO
WUU
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There are two other loops to pay attention to. The current
slew involves a high bandwidth control that goes through
the MOSFET switch, the sense resistor and into the CS pin
of the part and out the GATE pin to the MOSFET. Trace
inductance and resistance should be kept low on the GATE
drive trace. The CS trace should have low inductance.
Finally, care should be taken with the CAP pin. The part will
tolerate stray capacitance to ground on this pin (<5pFs).
However, stray capacitance to the MOSFET drain should
be minimized. This path would provide an alternate ca-
pacitive path for the voltage slew.
MORE HELP
AN70 contains information about low noise switchers and
measurement of noise and should be consulted. AN19 and
AN29 also have general knowledge concerning switching
regulators. Also, our Application Department is always
ready to lend a helping hand.
G20 SSOP 0802
0.09 – 0.25
(.0035 – .010)
0
° – 8°
0.55 – 0.95
(.022 – .037)
5.00 – 5.60**
(.197 – .221)
7.40 – 8.20
(.291 – .323)
1234
5
6
7
8910
6.90 – 7.50*
(.272 – .295 )
1718 14 13 12 1115161920
2.0
(.079)
0.05
(.002)
0.65
(.0256)
BSC
0.22 – 0.38
(.009 – .015)
MILLIMETERS
(INCHES)
DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED .152mm (.006") PER SIDE
DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
*
**
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
0.42 ±0.03 0.65 BSC
5.3 – 5.7
7.8 – 8.2
RECOMMENDED SOLDER PAD LAYOUT
1.25 ±0.12