Datasheet

14
LT1738
1738fa
APPLICATIO S I FOR ATIO
WUU
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most of the control circuitry of the regulator. Note after the
control circuitry powers on, gate driver activity will depend
on the voltage of V
IN
with respect to the voltage on GCL.
As the SHDN pin enables the internal regulator a 24µA
current will be sourced from the pin that can provide
hysteresis for undervoltage lockout. This hysteresis can
be used to prevent part shutdown due to input voltage sag
from an initial high current draw.
In addition to the current hysteresis, there is also approxi-
mately 100mV of voltage hysteresis on the SHDN pin.
When the SHDN pin is greater than 2.2V, the hysteretic
current from the part will be reduced to essentially zero.
If a resistor divider is used to set the turn on threshold then
the resistors are determined by the following equations:
V
RA RB
RB
V
VRA
V
RA RB
I
ON SHDN
HYST
SHDN
SHDN
=
+
=
+
RA
RB
V
IN
SHDN
Reworking these equations yields:
RA
VV VV
IV
RB
VV VV
IVV
HYST SHDN ON SHDN
SHDN SHDN
HYST SHDN ON SHDN
SHDN ON SHDN
=
−∆
()
()
=
−∆
()
()
[]
••
••
So if we wanted to turn on at 20V with 2V of hysteresis:
RA
VVVV
AV
k
RB
VVVV
AV V
k
=
µ
=
=
µ−
()
=
2 1 39 20 0 1
24 1 39
23 4
2 1 39 20 0 1
24 20 1 39
175
•. .
•.
.
•. .
•.
.
Resistor values could be altered further by adding zeners
in the divider string. A resistor in series with SHDN pin
could further change hysteresis without changing turn on
voltage.
Frequency Compensation
Loop frequency compensation is accomplished by way of
a series RC network on the output of the error amplifier
(V
C
␣ pin).
V
C
PIN
1738 F05
R
VC
2k
C
VC
0.01µF
C
VC2
4.7nF
Figure 5
Referring to Figure 5, the main pole is formed by capacitor
C
VC
and the output impedance of the error amplifier
(approximately 400k). The series resistor R
VC
creates a
“zero” which improves loop stability and transient re-
sponse. A second capacitor C
VC2
, typically one-tenth the
size of the main compensation capacitor, is sometimes
used to reduce the switching frequency ripple on the V
C
pin. V
C
pin ripple is caused by output voltage ripple
attenuated by the output divider and multiplied by the error
amplifier. Without the second capacitor, V
C
pin ripple is:
V
VgmR
V
CPINRIPPLE
RIPPLE VC
OUT
=
125.•
where V
RIPPLE
= Output ripple (V
P-P
)
gm = Error amplifier transconductance
R
VC
= Series resistor on V
C
pin
V
OUT
= DC output voltage
To prevent irregular switching, V
C
pin ripple should be
kept below 50mV
P-P
. Worst-case V
C
pin ripple occurs at
maximum output load current and will also be increased if
poor quality (high ESR) output capacitors are used. The
addition of a 0.0047µF capacitor for C
VC2
pin reduces
switching frequency ripple to only a few millivolts. A low
value for R
VC
will also reduce V
C
pin ripple, but loop phase
margin may be inadequate.