Datasheet

LT1719
14
1719fa
Figure 6a shows the standard TTL to Positive ECL (PECL)
resistive level translator. This translator cannot be used
for the LT1719, or with CMOS logic, because it depends
on the 820Ω resistor to limit the output swing (V
OH
) of
the all-NPN TTL gate with its so-called totem-pole output.
The LT1719 is fabricated in a complementary bipolar
process and the output stage has a PNP driver that pulls
the output nearly all the way to the supply rail, even when
sourcing 10mA.
Interfacing the LT1719 to ECL
The LT1719 comparators can be used in high speed ap-
plications where emitter-coupled logic (ECL) is deployed.
To interface the output of the LT1719 to ECL logic inputs,
standard TTL/CMOS to ECL level translators such as the
10H124, 10H424 and 100124 can be used. These com-
ponents come at a cost of a few nanoseconds additional
delay as well as supply currents of 50mA or more, and
are only available in quads. A faster, simpler and lower
power translator can be constructed with resistors as
shown in Figure 6.
APPLICATIONS INFORMATION
Figure 6
5V
5V
180Ω
DO NOT USE FOR LT1719
LEVEL TRANSLATION. SEE TEXT
270Ω
820Ω
10KH/E
R2
+V
S
or V
+
R3
R1
10KH/E
100K/E
+V
S
OR V
+
5V OR 5.2V
4.5V
R1
510Ω
620Ω
R2
180Ω
180Ω
R3
750Ω
510Ω
(a) STANDARD TTL TO PECL TRANSLATOR
(b) LT1719 OUTPUT TO PECL TRANSLATOR
LSTTL
LT1719
R2
V
ECL
3V
R3R4
R1
10KH/E
100K/E
V
ECL
5V OR 5.2V
4.5V
R1
300Ω
330Ω
R2
180Ω
180Ω
R3
OMIT
1500Ω
(c) 3V LT1719 OUTPUT TO PECL TRANSLATOR
LT1719
R4
560Ω
1000Ω
R4
V
ECL
+V
S
or V
+
R3
1719 F06
R2
R1
ECL FAMILY
10KH/E
V
ECL
–5.2V
R1
560Ω
270Ω
+V
S
OR V
+
5V
3V
R2
270Ω
510Ω
R3
330Ω
300Ω
(d) LT1719 OUTPUT TO STANDARD ECL TRANSLATOR
LT1719
R4
1200Ω
330Ω
100K/E –4.5V
680Ω
330Ω
5V
3V
270Ω
390Ω
300Ω
270Ω
1500Ω
430Ω