Datasheet

12
LT1681
1681f
translate the optocoupler information. The bandwidths of
the optocoupler and amplifier should be as high as pos-
sible to simplify system compensation. This high band-
width operation is accomplished by using the error ampli-
fier as a transimpedance amplifier, with the optocoupler
transistor emitter providing feedback information directly
into the V
FB
pin. A resistor from V
FB
to ground provides the
DC bias condition for the optocoupler. Connecting the
optocoupler transistor collector to the local 5V
REF
supply
reduces Miller capacitance effects and maximizes the band-
width of the optocoupler. Higher optocoupler current also
means higher bandwidth, and the 5V
REF
supply can pro-
vide collector currents up to 10mA.
APPLICATIO S I FOR ATIO
WUUU
Figure 3 is a plot of oscillator frequency vs C
FSET
and
R
FSET
. Typical values for 300kHz operation (150kHz sys-
tem frequency) are C
FSET
= 150pF and R
FSET
= 51k.
V
FB
5V
REF
V
OUT
SENSE
V
C
1.25V
1681 F01
LT1681
9
5
10
–
+
5V
Figure 2. Optocoupler High BW Configuration
Oscillator Frequency Programming
and Synchronization
The LT1681 internal oscillator runs at twice the system
switching frequency. The oscillator output toggles a T flip-
flop, generating a 50% duty cycle pulse that is used
internally as the system clock for the IC. Free-run fre-
quency for the internal oscillator is programmed via an RC
timing network connected to the FSET pin. A pull-up
resistor R
FSET
, connected from the 5V
REF
pin to FSET,
provides current to charge a timing capacitor C
FSET
con-
nected from the FSET pin to ground. The oscillator oper-
ates by allowing R
FSET
to charge C
FSET
up to 2.5V at which
point R
FSET
is pulled back toward ground by a 2.5k resistor
internal to the LT1681. When the voltage across C
FSET
is
pulled down to 1.5V, the FSET pin becomes high imped-
ance, once again allowing R
FSET
to charge C
FSET
.
TIMING RESISTOR (kΩ)
20
100
OSCILLATOR FREQUENCY (kHz)
150
250
300
350
600
450
40
60
70
1681 F03
200
500
550
400
30 50
80
90
100
330pF
150pF
100pF
200pF
Figure 3. Oscillator Frequency vs Timing Components
Due the relatively fast fall time of the oscillator waveform,
the FSET pin is held at its 1.5V threshold by an internal low-
impedance clamp to reduce undershoot error. If this pin is
externally forced low for any reason, external current
limiting is required to prevent damage to the LT1681.
Continuous source current from the FSET pin should not
exceed 1mA. Putting a 2k resistor in series with any low
impedance pull-down device will assure proper function
and protect the IC from damage.
Oscillator Synchronization
Synchronization of the LT1681 system clock is accom-
plished by driving a TTL level logic pulse train at the
desired system switching frequency into the SYNC pin. In
order to assure proper synchronization, each phase of the
synchronization signal must be less then an oscillator
free-run cycle.
The SYNC input pulse controls the phasing as well as the
frequency of controller switching. The SYNC circuit func-
tions by forcing the phase of the oscillator output flip-flop
to match the phase of the SYNC pulse and prematurely
ending the oscillator charge cycle on each transition
edge. At the SYNC low-to-high transition, the LT1681
starts a switch-on cycle and the minimum switch-off
period is forced during the SYNC logic low period.
Because the SYNC logic low period corresponds directly