Datasheet

13
LT1680
Power MOSFET and Output Rectifying Diode Selection
LT1680 converter system parameters that dictate selec-
tion criteria for the switch MOSFET and output rectifying
diode include maximum load current (I
OUT
), inductor
average current (I
AVG
) and inductor ripple current (∆I),
and maximum input and output voltages.
The switch MOSFETs selected must have a maximum
operating V
DSS
exceeding the maximum output voltage
(V
OUT
). V
GS
rated operating maximums must exceed the
12V
IN
supply voltage. Once voltage requirements have
been determined, switch conduction resistance (R
DS(ON)
)
can be determined based on allowable power dissipation.
In a typical LT1680 boost converter, the switch current is
equal to the inductor current, but is chopped according to
duty cycle (DC). The conduction loss (P
LOSS
) for a given
FET R
DS(ON)
can be calculated using the relation:
P
LOSS
≈ (DC)(R
DS(ON)
)(I
AVG
2
+ [∆I
2
/12])
where I
AVG
= average inductor current and ∆I = peak-to-
peak inductor ripple current.
The output diode is often a major source of power loss in
switching regulators and selection of adequately rated
diodes is important. In a boost converter, when the output
voltage is significantly higher than the input voltage, the
peak diode current becomes much higher than average
imposes an exponential increase in the slope compensa-
tion waveform, further increasing the effective compen-
sation slope up to 20% for a given setting.
Design example:
V
IN
= 20V
V
OUT
= 80V (DC = 0.75)
R
SENSE
= 0.01Ω
f
O
= 100kHz
L = 20µH
The minimum inductor usable with no additional slope
compensation is:
L
V
H
MIN
≥
()
Ω
()()
()( )( )
=µ
20 0 01 1 5 1
0 084 100000 1 0 75
47 6
..–
.–.
.
Since L = 20µH is less than L
MIN
, additional slope
compensation is necessary. The total slope compensa-
tion required is:
S
V
H
X
≥
µ






()
=
20
20
15 1
1075
210
6
.–
–.
()( )
Amp/s
Subtracting the internally generated slope compensation
and solving for the required effective resistance at SL/ADJ
yields:
R
f
Rf
k
EQ
O
SENSE O
≤
()()
()
()
()()()
=
2500
2 10 0 084
21 5
6
–.
.
Setting the resistor divider reference voltage to 2V assures
that the additional compensation waveform will be en-
abled at a 75% duty cycle. As shown in Figure 7a, using
R
SL1
= 45k and R
SL2
= 30k sets the desired reference
voltage and has a R
TH
of 18k, which meets both design
requirements. Figure 7b shows the slope compensation
effective waveforms both with and without the SL/ADJ
external resistors.
Figure 7a. External Slope Compensation Resistors
16
1
R
SL1
45k
R
SL2
30k
1680 F07a
5V
REF
SL/ADJ
LT1680
(0.084 + 0.139)(f
O
)
R
SENSE
(0.084)(f
O
)
R
SENSE
2.5V
2V
0.8V
DC = 0.75
1680 F07b
Figure 7b. Slope Compensation Waveforms
APPLICATIO S I FOR ATIO
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