Datasheet
12
LT1637
1637fd
SCHE ATIC
WW
SI PLIFIED
7
V
+
4
V
–
6
OUT
81
NULLNULL
1637 SS
3
5
+IN
–IN
Q25
Q24
Q26
Q18
Q17
R6
7k
R8
400Ω
R5
7k
R3
1.3k
R4
1.3k
SHDN
R7
400Ω
Q16
Q15Q10
Q11
Q9
Q8
Q14
Q2
D5
Q13Q1
10µA
Q20
Q23
D3
Q7
D1 D2
D4
Q6
Q4
Q5
2
R2
6k
R1
1M
Q3
Q19
Q21
Q22
Q12
APPLICATIO S I FOR ATIO
WUU
U
Gain
The open-loop gain is less sensitive to load resistance
when the output is sourcing current. This optimizes per-
formance in single supply applications where the load is
returned to ground. The typical performance photo of
Open-Loop Gain for various loads shows the details.
Shutdown
The LT1637 can be shut down two ways: using the
shutdown pin or bringing V
+
to within 0.5V of V
–
. When V
+
is brought to within 0.5V of V
–
both the supply current and
output leakage current drop to less than 10nA. When the
shutdown pin is brought 1.2V above V
–
, the supply
current drops to about 3µA and the output leakage current
is less than 1µA, independent of V
+
. In either case the input
bias current is less than 0.1nA (even if the inputs are 44V
above the negative supply).
Figure 1. Input Offset Nulling
LT1637
10k
1637 F01
V
–
1
8
The shutdown pin can be taken up to 32V above V
–
. The
shutdown pin can be driven below V
–
, however the pin
current through the substrate diode should be limited with
an external resistor to less than 10mA.
Input Offset Nulling
The input offset voltage can be nulled by placing a 10k
potentiometer between Pins 1 and 8 with its wiper to V
–
(see Figure 1). The null range will be at least ±3mV.