Datasheet

5
LT1619
1619fa
–
+
–
+
Q
R
I
LIM
1619 F02
CURRENT
LIMIT
COMPARATOR
S
Σ
++
–
+
DRIVER
280ns
CURRENT
SENSE
AMP
GATE
DRV
V
IN
6
GND
4
SENSE
R
SENSE
LOAD
5
7
LEADING
EDGE
BLANKING
C1
SYNC
RAMP COMP
300kHz
OSCILLATOR
SHUTDOWN
DELAY
REF/BIAS
S/S
1
FB
1.24V
1.8V
V
C
V
IN
CLK
IDLE
UVLO
–
+
V
B
–
+
A1
–
+
A2
ERROR
AMPLIFIER
2
3 8
g
m
Figure 2. LT1619 Block Diagram
S/S (Pin 1): Shutdown and Synchronization. Shutdown is
active low with a typical threshold voltage of 0.9V. For
normal operation, the S/S pin is tied to V
IN
. To externally
synchronize the controller, drive the S/S pin with pulses.
FB (Pin 2): The inverting Input of the Error Amplifier.
Connect the resistor divider tap here. Set V
OUT
according
to V
OUT
= 1.24(1 + R1/R2). See Figure 1.
V
C
(Pin 3): Compensation Pin for the Error Amplifier. V
C
is
the output of the transconductance amplifier. Overall loop
is compensated with an RC network from this pin to the
ground.
GND (Pin 4): Ground. Connect to local ground plane.
SENSE (Pin 5): The Input of the Current Sense Amplifier.
The SENSE pin is connected to the source of the N-channel
MOSFET and to a sense resistor to the ground. The current
limit threshold is internally set at 53mV, giving a maximum
switch current of 53mV/R
SENSE
.
GATE (Pin 6): The Output of the MOSFET Driver.
DRV (Pin 7): The Pull-Up Supply of the MOSFET Driver. Tie
this pin to V
IN
(Pin 8) for nonbootstrapped operation or to
the converter output for bootstrapped operation.
V
IN
(Pin 8): Supply or Battery Input. Must be closely
bypassed to the ground plane.
UU
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PI FU CTIO S
BLOCK DIAGRA
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