Datasheet

18
LT1506
APPLICATIONS INFORMATION
WUU
U
formulas show how to calculate each of these losses.
These formulas assume continuous mode operation, so
they should not be used for calculating efficiency at light
load currents.
Switch loss:
P
RI V
V
ns I V f
SW
SW OUT OUT
IN
OUT IN
=
()( )
+
()()()
2
24
Boost current loss:
P
VI
V
BOOST
OUT OUT
IN
=
()
2
50/
Quiescent current loss:
PV V
V
V
Q IN OUT
OUT
IN
=
()
+
()
+






()
0 001 0 005
0 002
2
..
.
R
SW
= Switch resistance (≈0.07)
24ns = Equivalent switch current/voltage overlap time
f = Switch frequency
Example: with V
IN
= 10V, V
OUT
= 5V and I
OUT
= 3A:
P
W
PW
PW
SW
BOOST
Q
=
( )()()
+




()( )




=+=
=
()( )
=
=
()
+
()
+
()( )
=
−
007 3 5
10
24 10 3 10 500 10
0 32 0 36 0 68
5350
10
015
10 0 001 5 0 005
5 0 002
10
004
2
93
2
2
.
••
...
/
.
..
.
.
Total power dissipation is 0.68 + 0.15 + 0.04 = 0.87W.
Thermal resistance for LT1506 package is influenced by
the presence of internal or backside planes. With a full
plane under the SO package, thermal resistance will be
about 80°C/W. No plane will increase resistance to about
120°C/W. To calculate die temperature, use the proper
thermal resistance number for the desired package and
add in worst-case ambient temperature:
T
J
= T
A
+ θ
JA
(P
TOT
)
With the SO-8 package (θ
JA
= 80°C/W), at an ambient
temperature of 50°C,
T
J
= 50 + 80 (0.87) = 120°C
Die temperature is highest at low input voltage, so use
lowest continuous input operating voltage for thermal
calculations.
FREQUENCY COMPENSATION
Loop frequency compensation of switching regulators
can be a rather complicated problem because the reactive
components used to achieve high efficiency also
introduce multiple poles into the feedback loop. The
inductor and output capacitor on a conventional step-
down converter actually form a resonant tank circuit that
can exhibit peaking and a rapid 180° phase shift at the
resonant frequency. By contrast, the LT1506 uses a “cur-
rent mode” architecture to help alleviate phase shift cre-
ated by the inductor. The basic connections are shown in
Figure 9. Figure 10 shows a Bode plot of the phase and gain
of the power section of the LT1506, measured from the V
C
pin to the output. Gain is set by the 5.3A/V transconduc-
tance of the LT1506 power section and the effective
complex impedance from output to ground. Gain rolls off
smoothly above the 600Hz pole frequency set by the
100µF output capacitor. Phase drop is limited to about
70°. Phase recovers and gain levels off at the zero fre-
quency (≈16kHz) set by capacitor ESR (0.1Ω).
Figure 9. Model for Loop Response
–
+
2.42V
V
SW
V
C
LT1506
GND
1506 F09
R1
OUTPUT
ESR
C
F
C
C
R
C
ERROR
AMPLIFIER
FB
R2
C1
CURRENT MODE
POWER STAGE
g
m
= 5.3A/V
+