Datasheet

LT1460
17
1460fc
Figure 13. C
L
= 0µF
Figure 14. C
L
= 0.1µF
Figure 15. I
OUT
= 1mA
Figure 12. Response Time Test Circuit
The LT1460S3 family of references are designed to be
stable with a large range of capacitive loads. With no
capacitive load, these references are ideal for fast settling
or applications where PC board space is a premium. The
test circuit shown in Figure 12 is used to measure the
response time and stability of various load currents and
load capacitors. This circuit is set for the 2.5V option. For
other voltage options, the input voltage must be scaled
up and the output voltage generator offset voltage must
be adjusted. The 1V step from 2.5V to 1.5V produces a
current step of 10mA or 1mA for R
L
= 100Ω or R
L
= 1k.
Figure 13 shows the response of the reference to these
applications inForMation
LT1460S3-2.5
R
L
V
OUT
V
GEN
1460 F12
C
IN
0.1µF
2.5V
1.5V
C
L
V
IN
= 2.5V
1µs/DIV
10mA
1mA
1.5V
2.5V
1460 F13
V
GEN
V
OUT
V
OUT
100µs/DIV
10mA
1mA
1.5V
2.5V
1460 F14
V
GEN
V
OUT
V
OUT
100µs/DIV
4.7µA
1µA
1.5V
2.5V
1460 F15
V
GEN
V
OUT
V
OUT
1mA and 10mA load steps with no load capacitance, and
Figure 14 shows a 1mA and 10mA load step with a 0.1µF
output capacitor. Figure 15 shows the response to a 1mA
load step with C
L
= 1µF and 4.7µF.
The frequency compensation of the LT1460S3 version is
slightly different than that of the other packages. Additional
care must be taken when choosing load capacitance in an
application circuit.
Table 1 gives the maximum output capacitance for vari-
ous load currents and output voltages of the LT1460S3 to
avoid instability. Load capacitors with low ESR (effective
series resistance) cause more ringing than capacitors
with higher ESR such as polarized aluminum or tantalum
capacitors.