Datasheet

11
LT1363
1363 SS01
OUT
+IN
–IN
V
+
V
–
R1
500Ω
C
C
R
C
C
W
I
SPL
II
F
ED S
W
A
CH
E
TI
C
The RC network across the output stage is bootstrapped
when the amplifier is driving a light or moderate load and
has no effect under normal operation. When driving a
capacitive load (or a low value resistive load) the network
is incompletely bootstrapped and adds to the compensa-
tion at the high impedance node. The added capacitance
slows down the amplifier which improves the phase
margin by moving the unity-gain frequency away from the
pole formed by the output impedance and the capacitive
load. The zero created by the RC combination adds phase
to ensure that even for very large load capacitances, the
total phase lag can never exceed 180 degrees (zero phase
margin) and the amplifier remains stable.
Comparison to Current Feedback Amplifiers
The LT1363 enjoys the high slew rates of Current Feed-
back Amplifiers (CFAs) while maintaining the characteris-
tics of a true voltage feedback amplifier. The primary
differences are that the LT1363 has two high impedance
inputs and its closed loop bandwidth decreases as the gain
increases. CFAs have a low impedance inverting input and
maintain relatively constant bandwidth with increasing
gain. The LT1363 can be used in all traditional op amp
configurations including integrators and applications such
as photodiode amplifiers and I-to-V converters where
there may be significant capacitance on the inverting
input. The frequency compensation is internal and not
dependent on the value of the feedback resistor. For CFAs,
the feedback resistance is fixed for a given bandwidth and
capacitance on the inverting input can cause peaking or
oscillations. The slew rate of the LT1363 in noninverting
gain configurations is also superior in most cases.
APPLICATIONS INFORMATION
WUU
U
Dimension in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTION
U
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
N8 1098
0.100
(2.54)
BSC
0.065
(1.651)
TYP
0.045 – 0.065
(1.143 – 1.651)
0.130 ± 0.005
(3.302 ± 0.127)
0.020
(0.508)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
0.125
(3.175)
MIN
0.009 – 0.015
(0.229 – 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.325
+0.035
–0.015
+0.889
–0.381
8.255
()
12
3
4
876
5
0.255 ± 0.015*
(6.477 ± 0.381)
0.400*
(10.160)
MAX
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)