Datasheet

11
LT1351
APPLICATIONS INFORMATION
WUU
U
resistive load) the network is incompletely bootstrapped
and adds to the compensation at the high impedance
node. The added capacitance slows down the amplifier
and a zero is created by the RC combination, both of
which improve the phase margin. The design ensures
that even for very large load capacitances the total phase
lag can never exceed 180 degrees (zero phase margin)
and the amplifier remains stable.
SI PLIFIED SCHE ATIC
WW
–
+
LT1351
11.3k
5.49k
13.3k
4.64k
4.64k
5.49k
220pF
V
OUT
V
IN
1351 TA03
470pF
2200pF
4700pF
–
+
LT1351
20kHz, 4th Order Butterworth Filter
R3
R6
R7
R
C
R2
R5
R4
Q21
OUTPUT
1351 SS
Q22
Q13
Q15
Q18
+IN
–IN
V
+
V
–
Q12
Q11
Q9
Q17
Q16
Q10
Q14
Q23
C1
C2
C
C
C
T
Q1
Q2
Q4
Q3
R1
1k
Q8
Q7
Q6
Q5
Q19
Q20
Q24
TYPICAL APPLICATIONS
U