Datasheet

LT1308A/LT1308B
9
1308abfb
APPLICATIONS INFORMATION
Waveforms for a LT1308B 5V to 12V boost converter using
a 10µF ceramic output capacitor are pictured in Figures 4
and 5. In Figure 4, the converter is operating in continuous
mode, delivering a load current of approximately 500mA.
The top trace is the output. The voltage increases as induc-
tor current is dumped into the output capacitor during the
switch off time, and the voltage decreases when the switch
is on. Ripple voltage is in this case due to capacitance,
as the ceramic capacitor has little ESR. The middle trace
is the switch voltage. This voltage alternates between a
V
CESAT
and V
OUT
plus the diode drop. The lower trace is
the switch current. At the beginning of the switch cycle,
the current is 1.2A. At the end of the switch on time, the
current has increased to 2A, at which point the switch turns
off and the inductor current fl ows into the output capacitor
through the diode. Figure 5 depicts converter waveforms
at a light load. Here the converter operates in discontinu-
ous mode. The inductor current reaches zero during the
switch off time, resulting in some ringing at the switch
node. The ring frequency is set by switch capacitance,
diode capacitance and inductance. This ringing has little
energy, and its sinusoidal shape suggests it is free from
harmonics. Minimizing the copper area at the switch node
will prevent this from causing interference problems.
LAYOUT HINTS
The LT1308A/LT1308B switch current at high speed, man-
dating careful attention to layout for proper performance.
You will not get advertised performance with careless
layout
. Figure 6 shows recommended component place-
ment for an SO-8 package boost (step-up) converter. Follow
this closely in your PC layout. Note the direct path of the
switching loops. Input capacitor C1
must be placed close
(<5mm) to the IC package. As little as 10mm of wire or PC
trace from C
IN
to V
IN
will cause problems such as inability
to regulate or oscillation.
The negative terminal of output capacitor C2 should tie
close to the ground pin(s) of the LT1308A/LT1308B. Doing
this reduces dI/dt in the ground copper which keeps high
frequency spikes to a minimum. The DC/DC converter
ground should tie to the PC board ground plane at one place
only, to avoid introducing dI/dt in the ground plane.
Figure 7 shows recommended component placement for
a boost converter using the TSSOP package. Placement
is similar to the SO-8 package layout.
Figure 4. 5V to 12V Boost Converter Waveforms in
Continuous Mode. 10μF Ceramic Capacitor Used at Output
Figure 5. Converter Waveforms in Discontinuous Mode
1308 F04
V
OUT
100mV/DIV
V
SW
10V/DIV
I
SW
500mA/DIV
500ns/DIV
1308 F05
V
OUT
20mV/DIV
V
SW
10V/DIV
I
SW
500mA/DIV
500ns/DIV
Figure 6. Recommended Component Placement for SO-8
Package Boost Converter. Note Direct High Current Paths
Using Wide PC Traces. Minimize Trace Area at Pin 1 (V
C
) and
Pin 2 (FB). Use Multiple Vias to Tie Pin 4 Copper to Ground
Plane. Use Vias at One Location Only to Avoid Introducing
Switching Currents into the Ground Plane
1
2
8
7
3
4
6
5
L1
C2
D1
LBO
LBI
LT1308A
LT1308B
V
OUT
V
IN
GND
SHUTDOWN
R1
R2
MULTIPLE
VIAs
GROUND PLANE
1308 F04
+
C1
+