Datasheet

11
LT1307/LT1307B
1307fa
51mA
1mA
I
L
5ms/DIV 1307 F11a
V
OUT
200mV/DIV
AC COUPLED
Figure 11a. V
C
Pin Left Unconnected. Output Ripple
Voltage is 300mV
P-P
Under Load
51mA
1mA
I
L
5ms/DIV 1307 F11b
Figure 11b. Inclusion of a 100k/22nF Series RC on V
C
Pin Results in Overdamped Stable Response
V
OUT
200mV/DIV
AC COUPLED
51mA
1mA
I
L
1ms/DIV 1307 F11a
V
OUT
200mV/DIV
AC COUPLED
Figure 11c. Reducing C to 2nF Speeds Up Response,
Although Still Overdamped
51mA
1mA
I
L
500µs/DIV 1307 F11b
Figure 11d. A 100k/200pF Series RC Shows Some
Underdamping
V
OUT
200mV/DIV
AC COUPLED
51mA
1mA
I
L
1ms/DIV 1307 F11b
Figure 11e. A 100k/680pF RC Provides Optimum
Settling Time with No Ringing
V
OUT
200mV/DIV
AC COUPLED
pole, requiring added C at the V
C
pin network to prevent
loop oscillation.
Observant readers will notice R has been set to 100k for all
the photos in Figure 11. Usable R values can be found in
the 10k to 500k range, but after too many trips to the
resistor bins, 100k wins.
underdamping. Now settling time is about 300µs. Increas-
ing C to 680pF results in the response shown in Figure 11e.
This response has minimum settling time with no over-
shoot or underdamping.
Converters using a 2-cell input need more capacitance at
the output. This added capacitance moves in the output
APPLICATIO S I FOR ATIO
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