Datasheet

7
LT1307/LT1307B
1307fa
V
C
(Pin 1): Compensation Pin for Error Amplifier. Con-
nect a series RC from this pin to ground. Typical values
are 100kΩ and 680pF. Minimize trace area at V
C
.
FB (Pin 2): Feedback Pin. Reference voltage is 1.22V.
Connect resistor divider tap here. Minimize trace area at
FB. Set V
OUT
according to: V
OUT
= 1.22V(1 + R1/R2).
SHDN (Pin 3): Shutdown. Ground this pin to turn off
switcher. Must be tied to V
IN
(or higher voltage) to enable
switcher. Do not float the SHDN pin.
GND (Pin 4): Ground. Connect directly to local ground
plane.
SW (Pin 5): Switch Pin. Connect inductor/diode here.
Minimize trace area at this pin to keep EMI down.
V
IN
(Pin 6): Supply Pin. Must have 1µF ceramic bypass
capacitor right at the pin, connected directly to ground.
LBI (Pin 7): Low-Battery Detector Input. 200mV refer-
ence. Voltage on LBI must stay between ground and
700mV.
LBO (Pin 8): Low-Battery Detector Output. Open collec-
tor, can sink 10µA. A 1MΩ pull-up is recommended.
Figure 2. LT1307/LT1307B Block Diagram
–
+
–
+
–
+
–
+
–
+
+
+
Σ
COMPARATOR
RAMP
GENERATOR
R
BIAS
V
C
g
m
Q2
×10
Q1
FB
FB
ENABLE
200mV
A = 3
FF
A2
A1
ERROR
AMPLIFIER
A4
0.15Ω
DRIVER
SW
GND
1307 F02
Q3
Q
S
600kHz
OSCILLATOR
5
LBO
LBI
SHDN
SHUTDOWN
3
7
1
4
R6
40k
R5
40k
R1
(EXTERNAL)
R3
30k
R4
140k
2
V
IN
V
IN
V
OUT
6
8
R2
(EXTERNAL)
*HYSTERESIS IN LT1307 ONLY
*
UU
U
PI FU CTIO S
BLOCK DIAGRA
W