Datasheet

14
LT1204
U
S
A
O
PP
L
IC
AT
I
WU
U
I FOR ATIO
All Hostile Crosstalk Test Setup*
Demonstration PC Board Schematic
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
IN0
GND
V
IN1
GND
V
IN2
GND
V
IN3
REF
+
C1
4.7µF
C2
0.1µF
+
C3
4.7µF
C4
0.1µF
R
F
750Ω
R
O
75Ω
R
G
750Ω
R3
10k
R1
10k
R2
10k
ENABLE
A1
A0
REF
V
+
V
–
GND
LT1204
V
IN0
V
IN1
V
IN2
V
IN3
V
+
V
O
V
–
FB
SHDN
ENABLE
A1
A0
SHUTDOWN
RESISTORS R1, R2 AND R3 ARE PULL-DOWN
AND PULL-UP RESISTORS FOR THE LOGIC
AND ENABLE PINS. THEY MAY BE OMITTED
IF THE LT1204 IS DRIVEN FROM TTL LEVELS
OR FROM 5V CMOS.
L1204 AI10
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
IN0
GND
V
IN1
GND
V
IN2
GND
V
IN3
REF
LT1204
V
+
V
O
V
–
FB
SHDN
ENABLE
A1
A0
–15V
15V
*SEE PC BOARD LAYOUT
1k
10Ω
1k
50Ω
50Ω
SPLITTER
OSC REF V
IN
50Ω 50Ω
HP4195A
NETWORK ANALYZER
50Ω
1204 AI11
10k
50Ω
Alternate All Hostile Crosstalk Setup*
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
IN0
GND
V
IN1
GND
V
IN2
GND
V
IN3
REF
LT1204
V
+
V
O
V
–
FB
SHDN
ENABLE
A1
A0
–15V
15V
*SEE PC BOARD LAYOUT
1k
10Ω
1k
50Ω
50Ω
SPLITTER
OSC REF V
IN
50Ω 50Ω
HP4195A
NETWORK ANALYZER
50Ω
1204 AI12
10k
50Ω
50Ω
50Ω