Datasheet

13
LT1182/LT1183/LT1184/LT1184F
BLOCK DIAGRAM
W
LT1182/LT1183 CCFL/LCD Contrast Regulator Top Level Block Diagram
FBN
10
–
+
I
LIM

AMP2
COMP2
COMP1
UNDER-
VOLTAGE
LOCKOUT
THERMAL
SHUTDOWN
2.4V
REGULATOR
SHUTDOWN
200kHz
OSC
DRIVE 2
SHUTDOWN
9
6
LCD
V
SW
LCD
PGND
LCD
V
C
FBP
I
CCFL
AGND DIO
BULB
CCFL
V
C
CCFL
PGND
CCFL
V
SW
ROYERBAT
V
IN
LOGIC 2
ANTI-
SAT2
LOGIC 1
DRIVE 1
LCD
GAIN = 4.4
GAIN = 4.4
Q3
2 ×
Q5
1 ×
Q4
5 ×
Q8
1 ×
Q10
2 ×
R1
0.125Ω
R4
0.1Ω
LT1183: FBP AND FBN ARE TIED TOGETHER TO CREATE FB
AT PIN 10. THE REFERENCE IS BROUGHT OUT TO PIN 11.
R2
0.25Ω
Q6
2 ×
R3
1k
D2
6V
D1
Q11
Q1
Q2
13
14
12
Q7
9 ×
Q9
3 ×
8
7
11
25
3
15
4
16
1
V2
1.24V
V1
0.45V
–
+
CCFL
0µA TO
100µA
–12mV
–
+
g
m
––
++
–
+
I
LIM

AMP1
ANTI-
SAT1
1182 BD01
+
–