Datasheet

8
LT1168
1168fa
Change in Input Bias Current for
V
CM
= 20V
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Settling Time vs Step Size Settling Time vs Gain
CHANGE IN INPUT BIAS CURRENT (pA)
0
0
PERCENT OF UNITS (%)
2
6
8
10
20
14
8
16
20 34
1168 G19
4
16
18
12
412
24
28
32
V
S
= ±15V
V
CM
= ±10V
T
A
= 25°C
302 N8 (2 LOTS)
313 SO-8 (2 LOTS)
615 TOTAL PARTS
R
INCM
= 5TΩ R
INCM
= 700GΩ
GAIN
1
1
SETTLING TIME (µs)
10
100
1000
10 100 1000
1168 G21
V
S
= ± 15V
T
A
= 25°C
∆V
OUT
= 10V TO 0.01%
Settling Time (0.1%)
vs Load Capacitance
LOAD CAPACITANCE (pF)
10
SETTLING TIME (µs)
34
32
30
28
26
24
22
20
18
16
1168 G22
30 100 300 1000
G = 10,
FALLING EDGE
G = 10,
RISING EDGE
G = 1, FALLING EDGE
G = 1, RISING EDGE
G = 100,
RISING EDGE
G = 100, FALLING EDGE
V
S
= ± 15V
T
A
= 25°C
R
L
= 1k
STEP SIZE = 10V
Falling Edge Settling Time
(0.10%)
V
IN
(V)
5µs/DIV 1168 G24
V
OUT
(V)
0
–5
–10
0
–5
–10
0.10
0.05
0.05
0.10
SETTLING (%)
0
Input Bias and Offset Current
vs Temperature
TEMPERATURE
–75
–50 –25 0 25 50 75 100 125
INPUT BIAS AND OFFSET CURRENT (pA)
1168 G23
500
400
300
200
100
0
–100
–200
–300
–400
–500
V
S
= ±15V
V
CM
= 0V
I
OS
I
B
T
A
= 25°C
V
S
= ±15V
R
L
= 2k
C
L
= 15pF
t = 0
Rising Edge Settling Time
(0.10%)
V
IN
(V)
5µs/DIV 1168 G25
V
OUT
(V)
10
5
0
10
5
0
0.10
0.05
0.05
0.10
SETTLING (%)
0
T
A
= 25°C
V
S
= ±15V
R
L
= 2k
C
L
= 15pF
t = 0
LOAD CAPACITANCE (pF)
10
SETTLING TIME (µs)
36
34
32
30
28
26
24
22
20
18
1168 G26
30 100 300 1000
G = 100,
FALLING EDGE
G = 1, RISING EDGE
G = 100,
RISING EDGE
G = 10, RISING EDGE
G = 1,
FALLING
EDGE
G = 10, FALLING EDGE
V
S
= ± 15V
T
A
= 25°C
R
L
= 1k
STEP SIZE = 10V
FREQUENCY (kHz)
1
PEAK-TO-PEAK OUTPUT SWING (V)
10 100 1000
1168 G27
35
30
25
20
15
10
5
0
V
S
= ±15V
T
A
= 25°C
G = 10, 100, 1000
G = 1
Settling Time (0.01%)
vs Load Capacitance
Undistorted Output Swing
vs Frequency
SETTLING TIME (µs)
8 101214161820222426283032
OUTPUT STEP (V)
2
6
10
1168 G20
–2
–6
0
4
8
–4
–8
–10
0V
V
OUT
TO 0.1%
TO 0.1%
TO 0.01%
TO 0.01%
0V
V
OUT
V
S
= ±15
G = 1
T
A
= 25°C
C
L
= 30pF
R
L
= 1k