Datasheet

7
LT1120A
1120afa
1120A TA04
–
+
C1
R1
AT A
V
= 100,
SLEW RATE = +0.05V/µs
–6V/µs
1M
C2
R2
IN
6
V
REF
7
50µA
A
V
–1
–10
–100
R1
33Ω
100Ω
10k
C1
0.1µF
0.047µF
0.002µF
C2
0.001µF
–
–
R2
1M
100k
10k
Compensating the Comparator as an Op Amp
Regulator with Output Voltage Monitor
1120A TA03
+
–
LOGIC 500k
5V
LOGIC
OUTPUT
7
REF
6
LT1120A
5
V
IN
OUTPUT
1
GND
FEEDBACK
4
8
2
0.001µF
98k
2k
100k
10µF
OUTPUT
5V
LOGIC OUTPUT GOES LOW WHEN
V
OUT
DROPS BY 100mV
+
V
OUT
PIN 7
LOGIC OUTPUT
Current Limited 1 Amp Regulator
LT1120A
1
GND
1M
100k
220µF
†
+
0.22µF
V
OUT
270Ω
2.2k
5
V
IN
4
2
FB
0.5Ω*
V
IN
V
OUT
5V AT 1A
*
SETS CURRENT
LIMIT BUT INCREASES
DROPOUT VOLTAGE
BY 0.5V.
MUST HAVE LOW
ESR. SEVERAL 100µF
CAPACITORS CAN BE
PARALLELED.
†
1120A TA06
MJE2955 2N3906*
Battery Backup Regulator
1120A TA05
V
OUT
FB
4
V
OUT
5V
2
0.001µF
1M
50k
1M
10µF
LT1120A
1
GND
5
V
IN
BATTERY
INPUT
V
IN
FB
LT1120A
1
GND
V
OUT
5
MAIN
POWER
INPUT
+
4
2
V
IN
V
OUT
INTERNAL PARASITIC
DIODES OF LT1120A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
TYPICAL APPLICATIO S
U