Datasheet

LT1116
7
1116fb
High Speed Adaptive Trigger Circuit
Line receivers often require an adaptive trigger to
compensate for variations in signal amplitude and DC
offsets. The circuit in Figure 3 triggers on 2mV to 200mV
signals from 100Hz to 10MHz from a single 5V rail. The
trigger level is the average of the input signal’s positive and
negative peaks stored on 0.005µF capacitors. Pairs of
NPN and PNP transistors are used instead of diodes to
temperature compensate the peak detector.
Figure 3. Fast Single Supply Adaptive Trigger
APPLICATIO S I FOR ATIO
WUUU
To achieve single supply operation, the input signal must
be shifted into the pre-amplifier’s common mode range.
The input amplifier A1 adds a 1V level shift, while A2
provides a gain of 20 for high frequency signals.
Capacitors C1 and C2 insure that low frequency signals
see unity gain. Bandwidth limiting in A1 and A2 does not
affect triggering because the adaptive trigger threshold
varies ratiometrically to maintain circuit output.
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LT1116 • AI03
Q
500Ω
200Ω
4R
200Ω
R
100Ω
50Ω
1kΩ
1kΩ
1kΩ
3kΩ
1%
3kΩ
1%
500pF
5pF
1000pF
3MΩ
3MΩ
0.1µF
47µF
C1
100µF
C2
0.1µF
0.005µF
0.005µF
5V
5V
5V
5V
5V
5V
LT1116
A2
LT1192
A1
LT1191
A3
LT1006
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Q
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CABLE
V
IN
NPN = 2N3904
PNP = 2N3906
TRIGGER
OUT
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.