Datasheet

LT1102
10
1102fb
Basic Connections
Offset NullingSettling Time Test Circuit
TYPICAL APPLICATIO S
U
INPUT
6
5
8
7
4
1
2
NC
NC
V
V
+
REF
3
OUT
GAIN = 100
INPUT
6
5
8
7
4
1
2
V
V
+
REF
3
OUT
GAIN = 10
LT1102 • TA03
LT1102
+
LT1102
+
1
8
5
6
3
4
15V
–15V
R1
5.0k
5.1k
FET PROBE
HP5082-2810
20V
P-P
FLAT-TOP INPUT
LT1102 • TA04
LT1102
+
200Ω
R1 = 910Ω, G = 10
R1 = 10k, G = 100
100Ω
6
3
4
1
8
5
15V
15V
2k
R2
OUT
2k
10k
1.8k
LT1102 • TA05
LT1102
+
R2 = 3.3Ω, G = 10
R2 = 30Ω, G = 100
NULL RANGE = ±1mV
GAIN DEGRADATION 0.018%