Datasheet

12
LT1021
TYPICAL APPLICATIONS
U
Boosted Output Current
with No Current Limit
Boosted Output Current
with Current Limit
Ultraprecise Current Source
LT1021-10
OUT
IN
TRIM
GND
4.32k
V
OUT
= 10.24V
V
IN
5k
V
–
= –15V*
*MUST BE WELL REGULATED
dV
OUT
dV
–
=
15mV
V
1021 TA12
Trimming 10V Units to 10.24V
CMOS DAC with Low Drift Full-Scale Trimming**
LT1021-10
TRIM
GND
OUT
LT1236 TA15
–
+
1.2k
R2
40.2Ω
1%
R1
4.99k
1%
REF
CMOS
DAC
7520, ETC
I
OUT
FB
30pF
LT1007C
R4*
100Ω
FULL-SCALE
ADJUST
R3
4.02K
1%
10V
F.S.
–15V
TC LESS THAN 200ppm/°C
NO ZERO ADJUST REQUIRED
WITH LT1007 (V
0S
≤ 60µV)
*
**
LT1021-7
OUT
IN
2
*LOW TC
3
4
7
GND
–15V
15V
TRIM
100Ω
15V
6
6.98k*
0.1%
17.4k
1%
1021 TA07
–
+
LT1001
I
OUT
= 1mA
REGULATION < 1ppm/V
COMPLIANCE = –13V TO 7V
LT1021
OUT
V
+
≥ (V
OUT
+ 1.8V)
GND
IN
1021 TA05
2N2905
10V AT
100mA
2µF
SOLID
TANT
R1
220Ω
+
LT1021
OUT
GND
IN
1021 TA06
2N2905
10V AT
100mA
2µF
SOLID
TANT
D1*
LED
V
+
≥ V
OUT
+ 2.8V
8.2Ω
R1
220Ω
*GLOWS IN CURRENT LIMIT,
DO NOT OMIT
+
Operating 5V Reference from 5V Supply
2-Pole Lowpass Filtered Reference
LT1021-5
OUT
IN
GND
1021 TA16
1N914
1N914
≈8.5V
C2*
5µF
C1*
5µF
5V
REFERENCE
5V LOGIC
SUPPLY
CMOS LOGIC GATE**
f
IN
≥ 2kHz*
FOR HIGHER FREQUENCIES C1 AND C2 MAY BE DECREASED
PARALLEL GATES FOR HIGHER REFERENCE CURRENT LOADING
*
**
+
+
LT1021
OUT
IN
GND
1021 TA13
–
+
R1
36k
1µF
MYLAR
0.5µF
MYLAR
R2
36k
LT1001
V
IN
V
IN
V
REF
–V
REF
f = 10Hz
TOTAL NOISE
≤2µV
RMS
1Hz ≤ f ≤ 10kHz