Datasheet

LTC2483
18
2483fc
input signal with better than 1ppm accuracy if the sampling
period is at least 14 times greater than the input circuit time
constant τ. The sampling process on the four input analog
pins is quasi-independent so each time constant should be
considered by itself and, under worst-case circumstances,
the errors may add.
When using the internal oscillator, the LTC2483’s front-end
switched-capacitor network is clocked at 123kHz corre-
sponding to an 8.1µs sampling period. Thus, for settling
errors of less than 1ppm, the driving source impedance
should be chosen such that τ 8.1µs/14 = 580ns. When an
external oscillator of frequency f
EOSC
is used, the sampling
period is 2.5/f
EOSC
and, for a settling error of less than
1ppm, τ ≤ 0.178/f
EOSC
.
Automatic Differential Input Current Cancellation
In applications where the sensor output impedance is
low (up to 10kΩ with no external bypass capacitor or up
to 500Ω with 0.001µF bypass), complete settling of the
input occurs. In this case, no errors are introduced and
direct digitization of the sensor is possible.
For many applications, the sensor output impedance
combined with external bypass capacitors produces RC
time constants much greater than the 580ns required for
1ppm accuracy. For example, a 10kΩ bridge driving a
0.1µF bypass capacitor has a time constant an order of
magnitude greater than the required maximum. Historically,
settling issues were solved using buffers. These buffers led
to increased noise, reduced DC performance (offset/drift),
limited input/output swing (cannot digitize signals near
ground or V
CC
), added system cost and increased power.
The LTC2483 uses a proprietary switching algorithm that
forces the average differential input current to zero inde-
pendent of external settling errors. This allows accurate
direct digitization of high impedance sensors without the
need of buffers (see Figures 8 to 10). Additional errors
resulting from mismatched leakage currents must also
be taken into account.
The switching algorithm forces the average input current
on the positive input (I
IN
+
) to be equal to the average input
current on the negative input (I
IN
). Over the complete
conversion cycle, the average differential input current
(I
IN
+
I
IN
) is zero. While the differential input current
applicaTions inFormaTion
C
EXT
2483 F08
V
INCM
+ 0.5V
IN
R
SOURCE
IN
+
LTC2483
C
PAR
20pF
C
EXT
V
INCM
– 0.5V
IN
R
SOURCE
IN
C
PAR
20pF
Figure 8. An RC Network at IN
+
and IN
Figure 9. +FS Error vs R
SOURCE
at IN
+
and IN
Figure 10. –FS Error vs R
SOURCE
at IN
+
and IN
R
SOURCE
(Ω)
1
+FS ERROR (ppm)
–20
0
20
1k
100k
2483 F09
–40
–60
–80
10 100 10k
40
60
80
V
CC
= 5V
V
REF
= 5V
V
IN
+
= 3.75V
V
IN
= 1.25V
T
A
= 25°C
C
EXT
= 0pF
C
EXT
= 100pF
C
EXT
= 1nF, 0.1µF, 1µF
R
SOURCE
(Ω)
1
–FS ERROR (ppm)
–20
0
20
1k
100k
2483 F10
–40
–60
–80
10 100 10k
40
60
80
V
CC
= 5V
V
REF
= 5V
V
IN
+
= 1.25V
V
IN
= 3.75V
T
A
= 25°C
C
EXT
= 0pF
C
EXT
= 100pF
C
EXT
= 1nF, 0.1µF, 1µF