Datasheet

LTC2481
23
2481fc
APPLICATIONS INFORMATION
Automatic Differential Input Current Cancellation
In applications where the sensor output impedance is
low (up to 10k with no external bypass capacitor or up
to 500 with 0.001µF bypass), complete settling of the
input occurs. In this case, no errors are introduced and
direct digitization of the sensor is possible.
For many applications, the sensor output impedance
combined with external bypass capacitors produces RC
time constants much greater than the 580ns required for
1ppm accuracy. For example, a 10k bridge driving a 0.1µF
bypass capacitor has a time constant several orders of
magnitude greater than the required maximum. Historically,
settling issues were solved using buffers. These buffers led
to increased noise, reduced DC performance (Offset/Drift),
limited input/output swing (cannot digitize signals near
ground or V
CC
), added system cost and increased power.
The LTC2481 uses a proprietary switching algorithm that
forces the average differential input current to zero inde-
pendent of external settling errors. This allows accurate
direct digitization of high impedance sensors without the
need of buffers (see Figures 13 to 15). Additional errors
resulting from mismatched leakage currents must also
be taken into account.
The switching algorithm forces the average input current
on the positive input (I
IN
+
) to be equal to the average input
current on the negative input (I
IN
). Over the complete
conversion cycle, the average differential input current
(I
IN
+
– I
IN
) is zero. While the differential input current
is zero, the common mode input current (I
IN
+
+ I
IN
)/2 is
proportional to the difference between the common mode
input voltage (V
INCM
) and the common mode reference
voltage (V
REFCM
).
In applications where the input common mode voltage
is equal to the reference common mode voltage, as in
the case of a balance bridge type application, both the
differential and common mode input current are zero.
The accuracy of the converter is unaffected by settling
errors. Mismatches in source impedances between IN
+
and IN
also do not affect the accuracy.
In applications where the input common mode voltage is
constant but different from the reference common mode
voltage, the differential input current remains zero while
Figure 13. An RC Network at IN
+
and IN
Figure 14. +FS Error vs R
SOURCE
at IN
+
and IN
Figure 15. –FS Error vs R
SOURCE
at IN
+
and IN
C
EXT
2481 F13
V
INCM
+ 0.5V
IN
R
SOURCE
IN
+
LTC2481
C
PAR
20pF
C
EXT
V
INCM
– 0.5V
IN
R
SOURCE
IN
C
PAR
20pF
R
SOURCE
(Ω)
1
+FS ERROR (ppm)
–20
0
20
1k
100k
2481 F14
–40
–60
–80
10 100 10k
40
60
80
V
CC
= 5V
V
REF
= 5V
V
IN
+
= 3.75V
V
IN
= 1.25V
T
A
= 25°C
C
EXT
= 0pF
C
EXT
= 100pF
C
EXT
= 1nF, 0.1µF, 1µF
R
SOURCE
()
1
–FS ERROR (ppm)
–20
0
20
1k
100k
2481 F15
–40
–60
–80
10 100 10k
40
60
80
V
CC
= 5V
V
REF
= 5V
V
IN
+
= 1.25V
V
IN
= 3.75V
T
A
= 25°C
C
EXT
= 0pF
C
EXT
= 100pF
C
EXT
= 1nF, 0.1µF, 1µF