Datasheet
LTC2481
22
2481fc
APPLICATIONS INFORMATION
Input Voltage Range
The analog input is truly differential with an absolute/
common mode range for the IN
+
and IN
–
input pins
extending from GND – 0.3V to V
CC
+ 0.3V. Outside these
limits, the ESD protection devices begin to turn on and the
errors due to input leakage current increase rapidly. Within
these limits, the LTC2481 converts the bipolar differential
input signal, V
IN
= IN
+
– IN
–
, from – FS to +FS where FS = 0.5
• V
REF
/GAIN. Beyond this range, the converter indicates the
overrange or the underrange condition using distinct output
codes. Since the differential input current cancellation does
not rely on an on-chip buffer, current cancellation as well
as DC performance is maintained rail-to-rail.
I
nput signals applied to IN
+
and IN
–
pins may extend by
300mV below ground and above V
CC
. In order to limit any
fault current, resistors of up to 5k may be added in series
with the IN
+
and IN
–
pins without affecting the performance
of the devices. The effect of the series resistance on the
converter accuracy can be evaluated from the curves
presented in the Input Current/Reference Current sections.
In addition, series resistors will introduce a temperature
dependent offset error due to the input leakage current.
A 1nA input leakage current will develop a 1ppm offset
error on a 5k resistor if V
REF
= 5V. This error has a very
strong temperature dependency.
Driving the Input and Reference
The input and reference pins of the LTC2481 converter
are directly connected to a network of sampling capaci-
tors. Depending upon the relation between the differential
input voltage and the differential reference voltage, these
capacitors are switching between these four pins transfer-
ring small amounts of charge in the process. A simplifi ed
equivalent circuit is shown in Figure 12.
For a simple approximation, the source impedance R
S
driving an analog input pin (IN
+
, IN
–
, REF
+
or REF
–
) can be
considered to form, together with R
SW
and C
EQ
(see Fig-
ure 12), a fi rst order passive network with a time constant
τ = (R
S
+ R
SW
) • C
EQ
. The converter is able to sample the
input signal with better than 1ppm accuracy if the sampling
period is at least 14 times greater than the input circuit time
constant τ. The sampling process on the four input analog
pins is quasi-independent so each time constant should be
considered by itself and, under worst-case circumstances,
the errors may add.
When using the internal oscillator, the LTC2481’s front-end
switched-capacitor network is clocked at 123kHz corre-
sponding to an 8.1µs sampling period. Thus, for settling
errors of less than 1ppm, the driving source impedance
should be chosen such that τ ≤ 8.1µs/14 = 580ns. When an
external oscillator of frequency f
EOSC
is used, the sampling
period is 2.5/f
EOSC
and, for a settling error of less than
1ppm, τ ≤ 0.178/f
EOSC
.
V
REF
+
V
IN
+
V
CC
R
SW
(TYP)
10k
I
LEAK
I
LEAK
V
CC
I
LEAK
I
LEAK
V
CC
R
SW
(TYP)
10k
C
EQ
12pF
(TYP)
R
SW
(TYP)
10k
I
LEAK
I
IN
+
V
IN
–
I
IN
–
I
REF
+
I
REF
–
2481 F12
I
LEAK
V
CC
I
LEAK
I
LEAK
SWITCHING FREQUENCY
f
SW
= 123kHz INTERNAL OSCILLATOR
f
SW
= 0.4 • f
EOSC
EXTERNAL OSCILLATOR
V
REF
–
R
SW
(TYP)
10k
IIN IIN
VV
R
I REF
VV V
R
V
VR
VD
R
VV V
R
V
VR
where
AVG AVG
IN CM REF CM
EQ
AVG
REF INCM REFCM
EQ
IN
REF EQ
REF T
EQ
REF REF CM IN CM
EQ
IN
REF EQ
REF
REF
–
v
v
v
v
–
() ()
() ()
.
.
.
.• •
.–
.•
–
•
05
15
05
05
15
05
2
2
:
.
V
VININ
V
IN IN
R M INTERNAL OSCILLATOR Hz MODE
REFCM
IN
INCM
EQ
¥
§
¦
´
¶
µ
v
V,
REF
REF
REF
–
¥
§
¦
´
¶
µ
2
2
271 60
R 2.98M INTERNAL OSCILLATOR 50Hz AND 60Hz MODE
R 0.833 10 / f EXTERNAL OSCILLATOR
D IS THE DENSITY OF A DIGITAL TRANSITION AT THE MODULATOR OUTPUT
EQ
EQ
12
EOSC
T
WHERE REF
–
IS INTERNALLY TIED TO GND
Figure 12. LTC2481 Equivalent Analog Input Circuit