Datasheet
LTC2481
19
2481fc
APPLICATIONS INFORMATION
Easy Drive Input Current Cancellation
The LTC2481 combines a high precision delta-sigma ADC
with an automatic differential input current cancellation
front end. A proprietary front-end passive sampling
network transparently removes the differential input
current. This enables external RC networks and high
impedance sensors to directly interface to the LTC2481
without external amplifi ers. The remaining common
mode input current is eliminated by either balancing the
differential input impedances or setting the common
mode input equal to the common mode reference (see
Automatic Input Current Cancellation section). This unique
architecture does not require on-chip buffers enabling
input signals to swing all the way to ground and up to
V
CC
. Furthermore, the cancellation does not interfere with
the transparent offset and full-scale auto-calibration and
the absolute accuracy (full-scale + offset + linearity) is
maintained even with external RC networks.
Conversion Clock
A major advantage the delta-sigma converter offers over
conventional type converters is an on-chip digital fi lter
(commonly implemented as a SINC or Comb fi lter). For
high resolution, low frequency applications, this fi lter is
typically designed to reject line frequencies of 50Hz or 60Hz
plus their harmonics. The fi lter rejection performance is
directly related to the accuracy of the converter system
clock. The LTC2481 incorporates a highly accurate on-chip
oscillator. This eliminates the need for external frequency
setting components such as crystals or oscillators.
Frequency Rejection Selection (CA0/f
0
)
The LTC2481 internal oscillator provides better than 110dB
normal mode rejection at the line frequency and all its
harmonics (up to the 255th) for 50Hz ±2% or 60Hz ±2%,
or better than 87dB normal mode rejection from 48Hz to
62.4Hz. The rejection mode is selected by writing to the
on-chip confi guration register (the default mode at power-
up is simultaneous 50Hz/60Hz rejection).
When a fundamental rejection frequency different from
50Hz or 60Hz is required or when the converter must be
synchronized with an outside source, the LTC2481 can
operate with an external conversion clock. The converter
automatically detects the presence of an external clock
signal at the CA0/f
0
pin and turns off the internal oscilla-
tor. The chip address for CA0 is internally set HIGH. The
frequency f
EOSC
of the external signal must be at least
10kHz to be detected. The external clock signal duty cycle
is not signifi cant as long as the minimum and maximum
specifi cations for the high and low periods t
HEO
and t
LEO
are observed.
Figure 8. Start a New Conversion without Reading Old Conversion Result
Figure 9. Synchronize the LTC2481s with the Global Address Call
7-BIT ADDRESS
CONVERSION CONVERSIONSLEEP DATA INPUT
S W ACK WRITE (OPTIONAL) P
2481 F08
GLOBAL ADDRESS
SCL
SDA
LTC2481 LTC2481 … LTC2481
ALL LTC2481s IN SLEEP CONVERSION OF ALL LTC2481s
DATA INPUT
S W ACK WRITE (OPTIONAL) P
2481 F09