Datasheet

LTC2481
11
2481fc
PIN FUNCTIONS
FUNCTIONAL BLOCK DIAGRAM
SCL (Pin 6): Serial Clock Pin of the I
2
C Interface. The
LTC2481 can only act as a slave and the SCL pin only ac-
cepts external serial clock. Data is shifted into the SDA pin
on the rising edges of the SCL clock and output through
the SDA pin on the falling edges of the SCL clock.
SDA (Pin 7): Bidirectional Serial Data Line of the I
2
C Inter-
face. In the transmitter mode (Read), the conversion result
is output through the SDA pin, while in the receiver mode
(Write), the device confi guration bits are input through the
SDA pin. At data input mode, the pin is high impedance;
while at data output mode, it is an open-drain N-channel
driver and therefore an external pull-up resistor or current
source to V
CC
is needed.
GND (Pin 8): Ground. Connect this pin to a ground plane
through a low impedance connection.
CA1 (Pin 9): Chip Address Control Pin. The CA1 pin is
confi gured as a three state (LOW, HIGH, or Floating) ad-
dress control bit for the device I
2
C address.
CA0/f
0
(Pin 10): Chip Address Control Pin/External Clock
Input Pin. When no transition is detected on the CA0/f
0
pin, it is a two state (HIGH or Floating) address control
bit for the device I
2
C address. When the pin is driven by
an external clock signal with a frequency f
EOSC
of at least
10kHz, the converter uses this signal as its system clock
and the fundamental digital fi lter rejection null is located
at a frequency f
EOSC
/5120 and sets the Chip Address CA0
internally to a HIGH.
6
7
4
5
9
10
3RD ORDER
$3ADC
REF
+
IN
+
IN
+
1
REF
+
IN
–
IN
–
REF
–
(1-256)
GAIN
I
2
C
SERIAL
INTERFACE
TEMP
SENSOR
MUX
SCL
2
V
CC
3
REF
–
8
GND
CA0/f
0
2481 FD
SDA
CA1
AUTOCALIBRATION
AND CONTROL
INTERNAL
OSCILLATOR