LTC2481 16-Bit ΔΣ ADC with Easy Drive Input Current Cancellation and I2C Interface DESCRIPTION FEATURES n n n n n n n n n n n n n n n Easy Drive™ Technology Enables Rail-to-Rail Inputs with Zero Differential Input Current Directly Digitizes High Impedance Sensors with Full Accuracy Programmable Gain from 1 to 256 Integrated Temperature Sensor GND to VCC Input/Reference Common Mode Range 2-Wire I2C Interface Programmable 50Hz, 60Hz or Simultaneous 50Hz/60Hz Rejection Mode 2ppm (0.
LTC2481 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 2) TOP VIEW Supply Voltage (VCC) to GND ...................... – 0.3V to 6V Analog Input Voltage to GND ....... –0.3V to (VCC + 0.3V) Reference Input Voltage to GND .. –0.3V to (VCC + 0.3V) Digital Input Voltage to GND ....... – 0.3V to (VCC + 0.3V) Digital Output Voltage to GND...... –0.3V to (VCC + 0.3V) Operating Temperature Range LTC2481C.................................................... 0°C to 70°C LTC2481I ..............................
LTC2481 ELECTRICAL CHARACTERISTICS (2X SPEED) The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 3, 4) PARAMETER CONDITIONS MIN l Resolution (No Missing Codes) 0.1 ≤ VREF ≤ VCC, –FS ≤ VIN ≤ +FS (Note 5) TYP MAX UNITS 16 Bits Integral Nonlinearity 5V ≤ VCC ≤ 5.5V, VREF = 5V, VIN(CM) = 2.5V (Note 6) 2.7V ≤ VCC ≤ 5.5V, VREF = 2.5V, VIN(CM) = 1.25V (Note 6) l 2 1 10 ppm of VREF Offset Error 2.
LTC2481 ANALOG INPUT AND REFERENCE The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
LTC2481 TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) SYMBOL PARAMETER MAX UNITS fEOSC External Oscillator Frequency Range CONDITIONS l MIN 10 TYP 4000 kHz tHEO External Oscillator High Period l 0.125 100 μs tLEO External Oscillator Low Period l 0.
LTC2481 TYPICAL PERFORMANCE CHARACTERISTICS Integral Nonlinearity (VCC = 5V, VREF = 5V) 1 –45°C 2 25°C 0 85°C –1 –2 Integral Nonlinearity (VCC = 2.7V, VREF = 2.5V) 3 VCC = 5V VREF = 2.5V VIN(CM) = 1.25V 1 –45°C, 25°C, 90°C 0 –1 2 –3 –1.25 2.5 1 –45°C, 25°C, 90°C 0 –1 –2 –2 –3 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5 INPUT VOLTAGE (V) VCC = 2.7V VREF = 2.5V VIN(CM) = 1.25V 2 INL (ppm OF VREF) INL (ppm OF VREF) 2 3 VCC = 5V VREF = 5V VIN(CM) = 2.
LTC2481 TYPICAL PERFORMANCE CHARACTERISTICS RMS Noise vs Input Differential Voltage VCC = 5V VREF = 5V VIN(CM) = 2.5V TA = 25°C VCC = 5V VREF = 5V VIN = 0V VIN(CM) = GND GAIN = 256 TA = 25°C 0.9 0.8 0.7 0.6 RMS Noise vs Temperature (TA) 1.0 0.8 0.4 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5 2 INPUT DIFFERENTIAL VOLTAGE (V) 0.7 0.6 –1 0 2 1 3 5 4 OFFSET ERROR (ppm OF VREF) 0.8 0.7 0.6 0.5 0.5 0.4 3.1 3.5 3.9 4.3 VCC (V) 4.7 5.1 0 5.5 1 2 3 VREF (V) 0 –0.1 –0.
LTC2481 TYPICAL PERFORMANCE CHARACTERISTICS Temperature Sensor vs Temperature 5 VCC = 5V VREF = 1.4V 0.25 308 2 FREQUENCY (kHz) VPTAT/VREF (V) 0.30 310 VCC = 5V VREF = 1.4V 4 0.35 On-Chip Oscillator Frequency vs Temperature 3 TEMPERATURE ERROR (°C) 0.40 Temperature Sensor Error vs Temperature 1 0 –1 –2 306 304 302 –3 –4 0.
LTC2481 TYPICAL PERFORMANCE CHARACTERISTICS Integral Nonlinearity (2x Speed Mode; VCC = 5V, VREF = 5V) 3 VREF = VCC + 450 IN– = GND IN = GND 400 CA0/f0 = EXT OSC TA = 25°C VCC = 5V 350 300 VCC = 3V 250 25°C, 90°C 0 –1 –2 100 90°C 0 –45°C, 25°C –1 –2 –3 –2.5 –2 –1.5 –1 –0.5 0 0.5 1 1.5 INPUT VOLTAGE (V) 10 20 30 40 50 60 70 80 90 100 OUTPUT DATA RATE (READINGS/SEC) Integral Nonlinearity (2x Speed Mode; VCC = 2.7V, VREF = 2.5V) NUMBER OF READINGS (%) 90°C 0 –45°C, 25°C –2 –0.25 0.25 0.
LTC2481 TYPICAL PERFORMANCE CHARACTERISTICS Offset Error vs VCC (2x Speed Mode) Offset Error vs VREF (2x Speed Mode) 250 VCC = 5V VIN = 0V VIN(CM) = GND TA = 25°C 230 150 100 220 –40 210 200 190 2.7 3 4 4.5 VCC (V) 3.5 5.5 5 160 –140 0 1 2 4 3 VREF (V) PSRR vs Frequency at VCC (2x Speed Mode) –40 10 10k 100k 1k 100 FREQUENCY AT VCC (Hz) 1M 2481 G38 0 VCC = 4.1V DC ±1.4V REF+ = 2.5V REF– = GND IN+ = GND IN– = GND TA = 25°C VCC = 4.1V DC ±0.7V REF+ = 2.
LTC2481 PIN FUNCTIONS SCL (Pin 6): Serial Clock Pin of the I2C Interface. The LTC2481 can only act as a slave and the SCL pin only accepts external serial clock. Data is shifted into the SDA pin on the rising edges of the SCL clock and output through the SDA pin on the falling edges of the SCL clock. SDA (Pin 7): Bidirectional Serial Data Line of the I2C Interface.
LTC2481 APPLICATIONS INFORMATION CONVERTER OPERATION Converter Operation Cycle The LTC2481 is a low power, ΔΣ analog-to-digital converter with an I2C interface. After power on reset, its operation is made up of three states. The converter operating cycle begins with the conversion, followed by the low power sleep state and ends with the data output/input (see Figure 1).
LTC2481 APPLICATIONS INFORMATION The LTC2481 can only be addressed as a slave. Once addressed, it can receive configuration bits or transmit the last conversion result. Therefore the serial clock line SCL is an input only and the data line SDA is bidirectional. The device supports the Standard-mode and the Fast-mode for data transfer speeds up to 400kbit/s. Figure 2 shows the definition of timing for Fast/Standard-mode devices on the I2C-bus.
LTC2481 APPLICATIONS INFORMATION 1 2 … 7 8 9 1 2 3 GS2 GS1 GS0 4 5 6 7 8 IM FA FB SPD 9 SCL 7-BIT ADDRESS SDA W ACK BY LTC2481 ACK BY LTC2481 START BY MASTER SLEEP DATA INPUT 2481 F03 Figure 3. Timing Diagram for Writing to the LTC2481 Table 1.
LTC2481 APPLICATIONS INFORMATION Table 2a. The LTC2481 Performance vs GAIN in Normal Speed Mode (VCC = 5V, VREF = 5V) GAIN Input Span LSB Noise Free Resolution* 1 4 8 16 32 64 128 256 ±2.5 ±0.625 ±0.312 ±0.156 ±78m ±39m ±19.5m ±9.76m UNIT V 38.1 9.54 4.77 2.38 1.19 0.596 0.298 0.149 μV 65536 65536 65536 65536 65536 65536 32768 16384 Counts Gain Error 5 5 5 5 5 5 5 8 Offset Error 0.5 0.5 0.5 0.5 0.5 0.5 0.5 0.5 ppm of FS μV UNIT Table 2b.
LTC2481 APPLICATIONS INFORMATION LTC2481 Data Format After a START condition, the master sends a 7-bit address followed by a R/W bit. The bit R/W is 1 for a Read request and 0 for a Write request. If the 7-bit address agrees with an LTC2481’s address, that device is selected. When the device is in the conversion state, it does not accept the request and issues a Not-Acknowledge (NACK) by leaving SDA HIGH. If the conversion is complete, it issues an acknowledge (ACK) by pulling SDA LOW.
LTC2481 APPLICATIONS INFORMATION 1 … 7 8 7-BIT ADDRESS R 9 1 SGN 2 … MSB 1 D15 ACK BY LTC2481 START BY MASTER 9 2 3 4 5 LSB PG2 PG1 PG0 ACK BY MASTER SLEEP 6 X 7 IM 8 9 SPD NAK BY MASTER DATA OUTPUT 2481 F04 Figure 4. Timing Diagram for Reading from the LTC2481 Initiating a New Conversion OPERATION SEQUENCE When the LTC2481 finishes a conversion, it automatically enters the sleep state. Once in the sleep state, the device is ready for Read/Write operations.
LTC2481 APPLICATIONS INFORMATION S R/W 7-BIT ADDRESS CONVERSION ACK DATA SLEEP Sr DATA TRANSFERRING P DATA INPUT/OUTPUT CONVERSION 2481 F05 Figure 5. The LTC2481 Conversion Sequence S 7-BIT ADDRESS R ACK READ P S 7-BIT ADDRESS R ACK READ P CONVERSION CONVERSION SLEEP DATA OUTPUT SLEEP DATA OUTPUT CONVERSION 2481 F06 Figure 6.
LTC2481 APPLICATIONS INFORMATION S 7-BIT ADDRESS CONVERSION W ACK SLEEP WRITE (OPTIONAL) DATA INPUT P CONVERSION 2481 F08 Figure 8. Start a New Conversion without Reading Old Conversion Result SCL SDA LTC2481 S LTC2481 GLOBAL ADDRESS W ACK … WRITE (OPTIONAL) ALL LTC2481s IN SLEEP LTC2481 P CONVERSION OF ALL LTC2481s DATA INPUT 2481 F09 Figure 9.
LTC2481 APPLICATIONS INFORMATION While operating with an external conversion clock of a frequency fEOSC, the LTC2481 provides better than 110dB normal mode rejection in a frequency range of fEOSC/5120 ± 4% and its harmonics. The normal mode rejection as a function of the input frequency deviation from fEOSC/5120 is shown in Figure 10. Table 6 summarizes the duration of the conversion state of each state and the achievable output data rate as a function of fEOSC.
LTC2481 APPLICATIONS INFORMATION On-Chip Temperature Sensor The LTC2481 contains an on-chip PTAT (proportional to absolute temperature) signal that can be used as a temperature sensor. The internal PTAT has a typical value of 420mV at 27°C and is proportional to the absolute temperature value with a temperature coefficient of 420/(27 + 273) = 1.40mV/°C (SLOPE), as shown in Figure 11. The internal PTAT signal is used in a single-ended mode referenced to device ground internally.
LTC2481 APPLICATIONS INFORMATION Input Voltage Range Driving the Input and Reference The analog input is truly differential with an absolute/ common mode range for the IN+ and IN– input pins extending from GND – 0.3V to VCC + 0.3V. Outside these limits, the ESD protection devices begin to turn on and the errors due to input leakage current increase rapidly. Within these limits, the LTC2481 converts the bipolar differential input signal, VIN = IN+ – IN–, from – FS to +FS where FS = 0.5 • VREF/GAIN.
LTC2481 APPLICATIONS INFORMATION Automatic Differential Input Current Cancellation In applications where the sensor output impedance is low (up to 10kΩ with no external bypass capacitor or up to 500Ω with 0.001μF bypass), complete settling of the input occurs. In this case, no errors are introduced and direct digitization of the sensor is possible. RSOURCE VINCM + 0.
LTC2481 APPLICATIONS INFORMATION the common mode input current is proportional to the difference between VINCM and VREFCM. For a reference common mode of 2.5V and an input common mode of 1.5V, the common mode input current is approximately 0.74μA (in simultaneous 50Hz/60Hz rejection mode). This common mode input current has no effect on the accuracy if the external source impedances tied to IN+ and IN– are matched.
LTC2481 APPLICATIONS INFORMATION the REF+ and REF– pins. For 50Hz mode, the related difference resistance is 1.2MΩ and the resulting full-scale error is 0.42ppm for each ohm of source resistance driving the REF+ and REF– pins. When CA0/f0 is driven by an external oscillator with a frequency fEOSC (external conversion clock operation), the typical differential reference resistance is 0.30 • 1012/fEOSC Ω and each ohm of source resistance driving the REF+ or REF– pins will result in 1.
LTC2481 APPLICATIONS INFORMATION In applications where the reference and input common mode voltages are different, extra errors are introduced. For every 1V of the reference and input common mode voltage difference (VREFCM – VINCM) and a 5V reference, each Ohm of reference source resistance introduces an extra (VREFCM – VINCM)/(VREF • REQ) full-scale gain error, which is 0.074ppm when using internal oscillator and 60Hz mode.
LTC2481 APPLICATIONS INFORMATION Output Data Rate When using its internal oscillator, the LTC2481 produces up to 7.5 samples per second (sps) with a notch frequency of 60Hz, 6.25sps with a notch frequency of 50Hz and 6.82sps with the 50Hz/60Hz rejection mode. The actual output data rate will depend upon the length of the sleep and data output phases which are controlled by the user and which can be made insignificantly short.
LTC2481 APPLICATIONS INFORMATION 22 24 20 22 20 20 RESOLUTION (BITS) RESOLUTION (BITS) TA = 85°C 18 16 VIN(CM) = VREF(CM) VCC = VREF = 5V VIN = 0V CA0/f0 = EXT CLOCK RES = LOG 2 (VREF/NOISERMS) 14 12 10 18 TA = 85°C TA = 25°C 16 14 VIN(CM) = VREF(CM) 12 VCC = VREF = 5V CA0/f0 = EXT CLOCK RES = LOG 2 (VREF/INLMAX) 10 0 10 20 30 40 50 60 70 80 90 100 OUTPUT DATA RATE (READINGS/SEC) 0 10 20 30 40 50 60 70 80 90 100 OUTPUT DATA RATE (READINGS/SEC) OFFSET ERROR (ppm OF VREF) TA = 25°C VIN(CM) =
LTC2481 APPLICATIONS INFORMATION high bandwidth (at least 500kHz) necessary to drive the input switched-capacitor network. A possible solution is a high gain, low bandwidth amplifier stage followed by a high bandwidth unity-gain buffer. For large values of the ratio fEOSC/307200, the Figure 30 plot accuracy begins to decrease, but at the same time the LTC2481 noise floor rises and the noise contribution of the driving amplifiers lose significance.
LTC2481 APPLICATIONS INFORMATION The user can expect to achieve this level of performance using the internal oscillator as it is demonstrated by Figures 35, 36 and 37. Typical measured values of the normal mode rejection of the LTC2481 operating with an internal oscillator and a 60Hz notch setting are shown in Figure 35 superimposed over the theoretical calculated curve.
LTC2481 APPLICATIONS INFORMATION MEASURED DATA CALCULATED DATA –20 –40 VCC = 5V VREF = 5V VIN(CM) = 2.5V VIN(P-P) = 5V TA = 25°C –60 –80 –100 –120 0 15 30 45 60 75 0 NORMAL MODE REJECTION (dB) NORMAL MODE REJECTION (dB) 0 –40 –80 –100 0 12.5 25 37.5 50 62.5 75 87.5 100 112.5 125 137.5 150 162.5 175 187.5 200 INPUT FREQUENCY (Hz) 2481 F35 2481 F36 Figure 35.
LTC2481 APPLICATIONS INFORMATION 0 INPUT NORMAL REJECTION (dB) INPUT NORMAL REJECTION (dB) 0 –20 –40 –60 –80 –100 –120 0 fN 2fN 3fN 4fN 5fN 6fN 7fN INPUT SIGNAL FREQUENCY (fN) –20 –40 –60 –80 –100 –120 248 250 252 254 256 258 260 262 264 INPUT SIGNAL FREQUENCY (fN) 8fN 2481 F40 2481 F41 Figure 40. Input Normal Mode Rejection 2x Speed Mode –70 0 MEASURED DATA VCC = 5V CALCULATED DATA VREF = 5V VINCM = 2.
LTC2481 APPLICATIONS INFORMATION Using the 2x speed mode of the LTC2481, the device bypasses the digital offset calibration operation to double the output data rate. The superior normal mode rejection is maintained as shown in Figures 31 and 32. However, the magnified details near DC and fS = 256fN are different, see Figures 40 and 41. In 2x speed mode, the bandwidth is 11.4Hz for the 50Hz rejection mode, 13.6Hz for the 60Hz rejection mode and 12.4Hz for the 50Hz/60Hz rejection mode.
LTC2481 APPLICATIONS INFORMATION /* LTC248X.h Processor setup and Lots of useful defines for configuring the LTC2481 and LTC2485. */ #include <16F73.h> #use delay(clock=6000000) // Device // 6MHz clock //#fuses NOWDT,HS, PUT, NOPROTECT, NOBROWNOUT // Configuration fuses #rom 0x2007={0x3F3A} // Equivalent and more reliable fuse config. #use I2C(master, sda=PIN_C5, scl=PIN_C3, SLOW)// Set up i2c port #include “PCM73A.h” // Various defines #include “lcd.
LTC2481 APPLICATIONS INFORMATION /* LTC2481.c Basic voltmeter test program for LTC2481 Reads LTC2481 input at gain = 1, 1X speed mode, converts to volts, and prints voltage to a 2 line by 16 character LCD display. Mark Thoren Linear Technology Corporation June 23, 2005 Written for CCS PCM compiler, Version 3.182 */ #include “LTC248X.h” /*** read_LTC2481() ************************************************************ This is the function that actually does all the work of talking to the LTC2481.
LTC2481 APPLICATIONS INFORMATION *******************************************************************************/ signed int32 read_LTC2481(char addr, char config) { struct fourbytes // Define structure of four consecutive bytes { // To allow byte access to a 32 bit int or float. int8 te0; // int8 te1; // The make32() function in this compiler will int8 te2; // also work, but a union of 4 bytes and a 32 bit int int8 te3; // is probably more portable. }; union // adc_code.bits32 all 32 bits { // adc_code.by.
LTC2481 APPLICATIONS INFORMATION lcd_init(); delay_ms(6); printf(lcd_putc, “Hello!”); delay_ms(500); } // End of initialize() // Initialize LCD // Obligatory hello message // for half a second *** main() ******************************************************************** Main program initializes microcontroller registers, then reads the LTC2481 repeatedly *******************************************************************************/ void main() { signed int32 x; // Integer result from LTC2481 float vol
LTC2481 PACKAGE DESCRIPTION DD Package 10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699 Rev B) 0.70 p0.05 3.55 p0.05 1.65 p0.05 2.15 p0.05 (2 SIDES) PACKAGE OUTLINE 0.25 p 0.05 0.50 BSC 2.38 p0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 3.00 p0.10 (4 SIDES) R = 0.125 TYP 6 0.40 p 0.10 10 1.65 p 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) (DD) DFN REV B 0309 5 0.200 REF 1 0.25 p 0.05 0.50 BSC 0.75 p0.05 0.00 – 0.05 2.38 p0.
LTC2481 REVISION HISTORY REV DATE DESCRIPTION PAGE NUMBER A 11/09 Update Tables 3 and 4 B 04/10 Added H-grade to Absolute Maximum Ratings, Order Information, Electrical Characteristics (Normal Speed), Converter Characteristics, Power Requirements, Timing Characteristics, and Typical Performance Characteristics C 06/10 Revised Typical Application drawing Added text to I2C Interface section 16 2-10 1 12 2481fc Information furnished by Linear Technology Corporation is believed to be accurate and
LTC2481 TYPICAL APPLICATION 5V PIC16F73 C8 1μF C7 0.1μF ISOTHERMAL 1.7k 1.