Datasheet

LTC2482
10
2482fc
TIMING DIAGRAMS
Timing Diagram Using Internal SCK
SDO
SCK
t
1
t
3
SLEEP
t
KQMAX
CONVERSIONDATA OUT
t
KQMIN
t
2
2482 TD1
CS
Timing Diagram Using External SCK
SDO
SCK
t
1
t
5
t
6
t
4
SLEEP
t
KQMAX
CONVERSIONDATA OUT
t
KQMIN
t
2
2482 TD2
CS
APPLICATIONS INFORMATION
CONVERTER OPERATION
Converter Operation Cycle
The LTC2482 is a low power, delta-sigma analog-to-digital
converter with an easy-to-use 3-wire serial interface and
automatic differential input current cancellation. Its opera-
tion is made up of three states. The converter operating
cycle begins with the conversion, followed by the low power
sleep state and ends with the data output (see Figure 1).
The 3-wire interface consists of serial data output (SDO),
serial clock (SCK) and chip select (CS).
Initially, the LTC2482 performs a conversion. Once the
conversion is complete, the device enters the sleep state.
While in this sleep state, power consumption is reduced
CONVERT
SLEEP
DATA OUTPUT
2482 F01
TRUE
FALSE
CS = LOW
AND
SCK
Figure 1. LTC2482 State Transition Diagram