Datasheet
LTC2484
32
2484fd
APPLICATIONS INFORMATION
second, the user is advised to maximize the power supply
voltage used and to limit the maximum ambient operating
temperature. In certain circumstances, a reduction of the
differential reference voltage may be benefi cial.
Input Bandwidth
The combined effect of the internal SINC
4
digital fi lter and
of the analog and digital autocalibration circuits determines
the LTC2484 input bandwidth. When the internal oscillator
OUTPUT DATA RATE (READINGS/SEC)
0
10
RESOLUTION (BITS)
12
16
18
22
10
50
70
2484 F24
14
20
40
90
100
20
30
60 80
T
A
= 85°C
T
A
= 25°C
V
IN(CM)
= V
REF(CM)
V
CC
= V
REF
= 5V
f
O
= EXT CLOCK
RES = LOG 2 (V
REF
/INL
MAX
)
Figure 24. Resolution (INL
RMS
≤ 1LSB)
vs Output Data Rate and Temperature
OUTPUT DATA RATE (READINGS/SEC)
0
–10
OFFSET ERROR (ppm OF V
REF
)
–5
5
10
20
10
50
70
2484 F25
0
15
40
90
100
20
30
60 80
V
CC
= 5V, V
REF
= 2.5V
V
CC
= V
REF
= 5V
V
IN(CM)
= V
REF(CM)
V
IN
= 0V
f
O
= EXT CLOCK
T
A
= 25°C
Figure 25. Offset Error vs Output
Data Rate and Reference Voltage
Figure 26. Resolution (Noise
RMS
≤ 1LSB)
vs Output Data Rate and Reference Voltage
Figure 27. Resolution (INL
RMS
≤ 1LSB) vs
Output Data Rate and Reference Voltage
OUTPUT DATA RATE (READINGS/SEC)
0
10
RESOLUTION (BITS)
12
16
18
20
24
10
50
70
2484 F26
14
22
40
90
100
20
30
60 80
V
IN(CM)
= V
REF(CM)
V
IN
= 0V
f
O
= EXT CLOCK
T
A
= 25°C
RES = LOG 2 (V
REF
/NOISE
RMS
)
V
CC
= 5V, V
REF
= 2.5V
V
CC
= V
REF
= 5V
OUTPUT DATA RATE (READINGS/SEC)
0
10
RESOLUTION (BITS)
12
16
18
22
10
50
70
2484 F27
14
20
40
90
100
20
30
60 80
V
CC
= 5V, V
REF
= 2.5V
V
CC
= V
REF
= 5V
V
IN(CM)
= V
REF(CM)
V
IN
= 0V
REF
–
= GND
f
O
= EXT CLOCK
T
A
= 25°C
RES = LOG 2 (V
REF
/INL
MAX
)
is used with the notch set at 60Hz, the 3dB input bandwidth
is 3.63Hz. When the internal oscillator is used with the
notch set at 50Hz, the 3dB input bandwidth is 3.02Hz. If
an external conversion clock generator of frequency f
EOSC
is connected to the f
O
pin, the 3dB input bandwidth is 11.8
• 10
–6
• f
EOSC
.
Due to the complex fi ltering and calibration algorithms
utilized, the converter input bandwidth is not modeled
very accurately by a fi rst order fi lter with the pole located