Datasheet

LTC2446/LTC2447
7
24467fa
TEST CIRCUITS
FU CTIO AL BLOCK DIAGRA
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W
Figure 1. Functional Block Diagram
APPLICATIO S I FOR ATIO
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CONVERTER OPERATION
Converter Operation Cycle
The LTC2446/LTC2447 are multichannel, multireference
high speed, delta-sigma analog-to-digital converters with
an easy to use 3- or 4-wire serial interface (see Figure 1).
Their operation is made up of three states. The converter
operating cycle begins with the conversion, followed by
the low power sleep state and ends with the data output/
input (see Figure 2). The 4-wire interface consists of serial
data input (SDI), serial data output (SDO), serial clock
(SCK) and chip select (CS). The interface, timing, opera-
tion cycle and data out format is compatible with Linear’s
entire family of ∆Σ converters.
Initially, the LTC2446/LTC2447 perform a conversion.
Once the conversion is complete, the device enters the
Figure 2. LTC2446/LTC2447 State Transition Diagram
AUTOCALIBRATION
AND CONTROL
DIFFERENTIAL
3RD ORDER
∆Σ MODULATOR
DECIMATING FIR
ADDRESS
INTERNAL
OSCILLATOR
SERIAL
INTERFACE
GND
V
CC
CH0
CH1
•
•
•
•
•
•
CH7
COM
IN
+
REF
+
REF
–
IN
–
INPUT/REFERENCE MUX
SDO
SCK
V
REFG
+
V
REFG
–
V
REF67
+
V
REF67
–
V
REF01
+
V
REF01
–
CS
SDI
F
O
(INT/EXT)
24467 F01
CONVERT
SLEEP
NO
YES
CHANNEL SELECT
REFERENCE SELECT
SPEED SELECT
DATA OUTPUT
POWER UP
IN
+
=CH0, IN
–
=CH1
REF
+
= V
REFO1
+
,
REF
–
= V
REF01
–
OSR=256,1X MODE
24467 F02
CS = LOW
AND
SCK
1.69k
SDO
24467 TA03
Hi-Z TO V
OH
V
OL
TO V
OH
V
OH
TO Hi-Z
C
LOAD
= 20pF
1.69k
SDO
24467 TA04
Hi-Z TO V
OL
V
OH
TO V
OL
V
OL
TO Hi-Z
C
LOAD
= 20pF
V
CC