Datasheet
LTC2446/LTC2447
15
24467fa
External Serial Clock, Single Cycle Operation
(SPI/MICROWIRE Compatible)
This timing mode uses an external serial clock to shift out
the conversion result and a CS signal to monitor and
control the state of the conversion cycle, see Figure 4.
The serial clock mode is selected by the EXT pin. To select
the external serial clock mode, EXT must be tied low.
The serial data output pin (SDO) is Hi-Z as long as CS is
HIGH. At any time during the conversion cycle, CS may be
pulled LOW in order to monitor the state of the converter.
While CS is pulled LOW, EOC is output to the SDO pin.
EOC = 1 (BUSY = 1) while a conversion is in progress and
EOC = 0 (BUSY = 0) if the device is in the sleep state.
Independent of CS, the device automatically enters the low
power sleep state once the conversion is complete.
When the device is in the sleep state (EOC = 0), its
conversion result is held in an internal static shift regis-
ter. The device remains in the sleep state until the first
rising edge of SCK is seen. Data is
shifted out the SDO pin
on each falling edge of SCK. This enables external circuitry
to latch the output on the rising edge of SCK. EOC can be
latched on the first rising edge of SCK and the last bit of
the conversion result can be latched on the 32nd rising
edge of SCK. On the 32nd falling edge of SCK, the device
begins a new conversion. SDO goes HIGH (EOC = 1) and
BUSY goes HIGH indicating a conversion is in progress.
At the conclusion of the data cycle, CS may remain LOW
and EOC monitored as an end-of-conversion interrupt.
Alternatively, CS may be driven HIGH setting SDO to Hi-Z
and BUSY monitored for the completion of a conversion.
Figure 4. External Serial Clock, Single Cycle Operation
APPLICATIO S I FOR ATIO
WUUU
MSB
BIT 28 BIT 27 BIT 26 BIT 25 BIT 24 BIT 23 BIT 22 BIT 21 BIT 20 BIT 19 BIT 0
LSB
Hi-Z
24467 F04
SIG
BIT 29
“0”
BIT 30
EOC
Hi-Z
CS
SCK
(EXTERNAL)
SDI
SDO
BUSY
BIT 31
1 0 EN SGL GLBL A1 A0 OSR3 OSR2 OSR1 OSR0 TWOXODD
1234567891011121314 32
CONVERSION SLEEP DATA OUTPUT CONVERSION
TEST EOC TEST EOC
V
CC
F
O
REF67
+
REF67
–
CH0
CH1
CH2
CH7
COM
REFG
+
REFG
–
REF01
+
REF01
–
SCK
SDI
SDO
CS
GND
28
29
30
11
10
35
24
23
8
9
12
22
7
38
37
1,4,5,6,31,32,33
36
34
USER SELECTABLE
REFERENCES
0.1V TO V
CC
ANALOG
INPUTS
.
.
.
.
.
.
2
= EXTERNAL OSCILLATOR
= INTERNAL OSCILLATOR
1µF
4.5V TO 5.5V
LTC2446
4-WIRE
SPI INTERFACE
BUSY