Datasheet

LTC2444/LTC2445/
LTC2448/LTC2449
7
2444589fb
TEST CIRCUITS
FU CTIO AL BLOCK DIAGRA
UU
W
Figure 1. Functional Block Diagram
1.69k
SDO
2440 TA03
Hi-Z TO V
OH
V
OL
TO V
OH
V
OH
TO Hi-Z
C
LOAD
= 20pF
1.69k
SDO
2440 TA04
Hi-Z TO V
OL
V
OH
TO V
OL
V
OL
TO Hi-Z
C
LOAD
= 20pF
V
CC
APPLICATIO S I FOR ATIO
WUU
U
CONVERTER OPERATION
Converter Operation Cycle
The LTC2444/LTC2445/LTC2448/LTC2449 are multi-
channel, high speed, delta-sigma analog-to-digital con-
verters with an easy to use 3- or 4-wire serial interface (see
Figure 1). Their operation is made up of three states. The
converter operating cycle begins with the conversion,
followed by the low power sleep state and ends with the
data output/input (see Figure 2). The 4-wire interface
consists of serial data input (SDI), serial data output
(SDO), serial clock (SCK) and chip select (CS). The inter-
face, timing, operation cycle and data out format is com-
patible with Linear’s entire family of ∆Σ converters.
Figure 2. LTC2444/LTC2445/LTC2448/LTC2449
State Transition Diagram
AUTOCALIBRATION
AND CONTROL
DIFFERENTIAL
3RD ORDER
∆Σ MODULATOR
DECIMATING FIR
ADDRESS
INTERNAL
OSCILLATOR
SERIAL
INTERFACE
GND
V
CC
CH0
CH1
•
•
•
CH15
COM
IN
+
IN
–
MUX
SDO
SCK
REF
+
REF
–
CS
SDI
F
O
(INT/EXT)
2444 F01
+
–
CONVERT
SLEEP
CHANNEL SELECT
SPEED SELECT
DATA OUTPUT
POWER UP
IN
+
=CH0, IN
–
=CH1
OSR=256,1X MODE
2444 F02
CS = LOW
AND
SCK