Datasheet

LTC2439-1
25
24391fa
impedance for the REF
+
and REF
–
pins does not help the
gain or the INL error. The user is thus advised to minimize
the combined source impedance driving the REF
+
and
REF
–
pins rather than to try to match it.
The magnitude of the dynamic reference current depends
upon the size of the very stable internal sampling capaci-
tors and upon the accuracy of the converter sampling
clock. The accuracy of the internal clock over the entire
temperature and power supply range is typical better than
0.5%. Such a specification can also be easily achieved by
an external clock. When relatively stable resistors
(50ppm/°C) are used for the external source impedance
seen by REF
+
and REF
–
, the expected drift of the dynamic
current gain error will be insignificant (about 1% of its
value over the entire temperature and voltage range). Even
for the most stringent applications a one-time calibration
operation may be sufficient.
In addition to the reference sampling charge, the reference
pins ESD protection diodes have a temperature dependent
leakage current. This leakage current, nominally 1nA
(±10nA max), results in a small gain error. A 100Ω source
resistance will create a 0.05µV typical and 0.5µV maxi-
mum full-scale error.
Output Data Rate
When using its internal oscillator, the LTC2439-1 can
produce up to 6.8 readings per second. The actual output
data rate will depend upon the length of the sleep and data
output phases which are controlled by the user and which
can be made insignificantly short. When operated with an
external conversion clock (F
O
connected to an external
oscillator), the LTC2439-1 output data rate can be in-
creased as desired. The duration of the conversion phase
is 20510/f
EOSC
. If f
EOSC
= 139,800Hz, the converter be-
haves as if the internal oscillator is used with simultaneous
50Hz/60Hz. There is no significant difference in the
LTC2439-1 performance between these two operation
modes.
An increase in f
EOSC
over the nominal 139,800Hz will
translate into a proportional increase in the maximum
output data rate. This substantial advantage is neverthe-
less accompanied by three potential effects, which must
be carefully considered.
R
SOURCE
(Ω)
0
100 200 300 400 500 600 700 800 900 1000
+FS ERROR (LSB)
24361 F21
0
6
11
17
22
30
V
CC
= 5V
REF
+
= 5V
REF
–
= GND
IN
+
= 3.75V
IN
–
= 1.25V
F
O
= GND
T
A
= 25°C
C
REF
= 0.01µF
C
REF
= 0.1µF
C
REF
= 1µF, 10µF
R
SOURCE
(Ω)
0
100 200 300 400 500 600 700 800 900 1000
–FS ERROR (LSB)
24361 F22
30
22
17
11
6
0
V
CC
= 5V
REF
+
= 5V
REF
–
= GND
IN
+
= 1.25V
IN
–
= 3.75V
F
O
= GND
T
A
= 25°C
C
REF
= 0.01µF
C
REF
= 0.1µF
C
REF
= 1µF, 10µF
V
INDIF
/V
REFDIF
–0.5–0.4–0.3–0.2–0.1 0 0.1 0.2 0.3 0.4 0.5
INL (LSB)
1
0
–1
V
CC
= 5V
REF+ = 5V
REF– = GND
V
INCM
= 0.5 • (IN
+
+ IN
–
) = 2.5V
F
O
= GND
C
REF
= 10µF
T
A
= 25°C
R
SOURCE
= 1000Ω
24361 F23
Figure 21. +FS Error vs R
SOURCE
at REF
+
and REF
–
(Large C
REF
) Figure 22. –FS Error vs R
SOURCE
at REF
+
and REF
–
(Large C
REF
)
Figure 23. INL vs Differential Input Voltage (V
IN
= IN
+
– IN
–
)
and Reference Source Resistance (R
SOURCE
at REF
+
and REF
–
for Large C
REF
Values (C
REF
≥ 1µF)
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