Datasheet

LTC2439-1
10
24391fa
Table 1. Channel Selection
MUX ADDRESS CHANNEL SELECTION
ODD/
SGL SIGN A2 A1 A0 0 123456789101112131415COM
*00000IN
+
IN
–
00001 IN
+
IN
–
00010 IN
+
IN
–
00011 IN
+
IN
–
00100 IN
+
IN
–
00101 IN
+
IN
–
00110 IN
+
IN
–
00111 IN
+
IN
–
01000IN
–
IN
+
01001 IN
–
IN
+
01010 IN
–
IN
+
01011 IN
–
IN
+
01100 IN
–
IN
+
01101 IN
–
IN
+
01110 IN
–
IN
+
01111 IN
–
IN
+
10000IN
+
IN
–
10001 IN
+
IN
–
10010 IN
+
IN
–
10011 IN
+
IN
–
10100 IN
+
IN
–
10101 IN
+
IN
–
10110 IN
+
IN
–
10111 IN
+
IN
–
11000 IN
+
IN
–
11001 IN
+
IN
–
11010 IN
+
IN
–
11011 IN
+
IN
–
11100 IN
+
IN
–
11101 IN
+
IN
–
11110 IN
+
IN
–
11111 IN
+
IN
–
*Default at power up
APPLICATIO S I FOR ATIO
WUUU
maintain the parasitic capacitance of the connection be-
tween these series resistors and the corresponding pins
as low as possible; therefore, the resistors should be
located as close as practical to the pins. In addition, series
resistors will introduce a temperature dependent offset
error due to the input leakage current. A 10nA input
leakage current will develop a 1LBS offset error on an 8k
resistor if V
REF
= 5V. This error has a very strong tempera-
ture dependency.