
LTC2601/LTC2611/LTC2621
10
2601fb
BLOCK DIAGRAM
TIMING DIAGRAMS
Figure 1a
Figure 1b
7
10
1
DAC
REGISTER
INPUT
REGISTER
32-BIT
SHIFT
REGISTER
12-/14-/16-BIT DAC
V
OUT
CONTROL
DECODE
LOGIC
LDAC
SDO
2
SDI
SCK
5
CS/LD
9
V
CC
6
REF
8
GND
2601 BD
4
CLR
3
SDI
SDO
S/LD
SCK
2601 F01a
t
2
t
8
t
10
t
5
t
7
t
6
t
1
LDAC
t
3
t
4
1232324
t
13
t
12
CS/LD
2601 F01b
t
13
LDAC