Datasheet

LTC1857/LTC1858/LTC1859
18
185789fa
FREQUENCY (kHz)
0
MAGNITUDE (dB)
–60
–40
–20
0
40
1859 F12
–80
–100
–70
–50
–30
–10
–90
–110
–130
–120
10
20
30
545
15
25
35
50
f
SAMPLE
= 100kHz
f
IN
= 1kHz
SINAD = 86.95dB
THD = –101.42dB
APPLICATIONS INFORMATION
SIGNAL-TO-NOISE RATIO
The Signal-to-Noise and Distortion Ratio (SINAD) is the
ratio between the RMS amplitude of the fundamental input
frequency to the RMS amplitude of all other frequency
components at the A/D output. The output is band limited
to frequencies from above DC and below half the sampling
frequency. Figure 12 shows a typical SINAD of 87dB with
a 100kHz sampling rate and a 1kHz input.
TOTAL HARMONIC DISTORTION
Total Harmonic Distortion (THD) is the ratio of the RMS
sum of all harmonics of the input signal to the fundamental
itself. The out-of-band harmonics alias into the frequency
band between DC and half the sampling frequency. THD
is expressed as:
THD = 20log
V
2
2
3
2
4
22
1
++ +VV V
V
N
...
where V
1
is the RMS amplitude of the fundamental fre-
quency and V
2
through V
N
are the amplitudes of the second
through Nth harmonics.
BOARD LAYOUT, POWER SUPPLIES
AND DECOUPLING
Wire wrap boards are not recommended for high reso-
lution or high speed A/D converters. To obtain the best
performance from the LTC1857/LTC1858/LTC1859, a
printed circuit board is required. Layout for the printed
circuit board should ensure the digital and analog signal
lines are separated as much as possible. In particular, care
should be taken not to run any digital track alongside an
analog signal track or underneath the ADC. The analog
input should be screened by AGND.
In applications where the MUX is connected to the ADC, it is
possible to get noise coupling into the ADC from the trace
connecting the MUXOUT to the ADC. Therefore, reducing
the length of the traces connecting the MUXOUT pins (Pins
10, 11) to the ADC pins (Pins 12, 13) can minimize the
problem. The unused MUX inputs should be grounded to
prevent noise coupling into the inputs.
Figure 13 shows the power supply grounding that will help
obtain the best performance from the 12-bit/14-bit/16-bit
ADCs. Pay particular attention to the design of the analog
and digital ground planes. The DGND pin of the LTC1857/
Figure 12. LTC1859 Nonaveraged 4096 Point FFT Plot