Datasheet
LTC2430/LTC2431
26
24301f
into about 0.11ppm additional INL error. When F
O
= HIGH
(internal oscillator and 50Hz notch), every 100Ω of source
resistance driving REF
+
or REF
–
translates into about
0.092ppm additional INL error. When F
O
is driven by an
external oscillator with a frequency f
EOSC
, every 100Ω of
source resistance driving REF
+
or REF
–
translates into
about 0.73 • 10
–6
• f
EOSC
ppm additional INL error. Fig-
ure␣ 19 shows the typical INL error due to the source
resistance driving the REF
+
or REF
–
pins when large C
REF
values are used. The effect of the source resistance on the
two reference pins is additive with respect to this INL error.
In general, matching of source impedance for the REF
+
APPLICATIO S I FOR ATIO
WUUU
and REF
–
pins does not help the gain or the INL error. The
user is thus advised to minimize the combined source
impedance driving the REF
+
and REF
–
pins rather than to
try to match it.
The magnitude of the dynamic reference current depends
upon the size of the very stable internal sampling capaci-
tors and upon the accuracy of the converter sampling
clock. The accuracy of the internal clock over the entire
temperature and power supply range is typical better than
1%. Such a specification can also be easily achieved by an
external clock. When relatively stable resistors (50ppm/°C)
are used for the external source impedance seen by REF
+
and REF
–
, the expected drift of the dynamic current gain
error will be insignificant (about 1% of its value over the
entire temperature and voltage range). Even for the most
stringent applications, a one-time calibration operation
may be sufficient.
In addition to the reference sampling charge, the reference
pins ESD protection diodes have a temperature dependent
leakage current. This leakage current, nominally 1nA
(±10nA max), results in a small gain error. A 100Ω source
resistance will create a 0.05µV typical and 0.5µV maxi-
mum full-scale error.
Figure 18a. +FS Error vs R
SOURCE
at REF
+
or REF
–
(Large C
REF
)
Figure 18b. –FS Error vs R
SOURCE
at REF
+
or REF
–
(Large C
REF
)
R
SOURCE
(Ω)
–50
–60
+FS ERROR (ppm)
–30
–10
0
–40
–20
200 400 600 800
2431 F18a
10001000 300 500 700 900
C
REF
= 1µF, 10µF
C
REF
= 0.1µF
C
REF
= 0.01µF
V
CC
= 5V
V
REF
+
= 5V
V
REF
–
= GND
V
IN
+
= 3.75V
V
IN
–
= 1.25V
F
O
= GND
T
A
= 25°C
R
SOURCE
(Ω)
10
0
–FS ERROR (ppm)
30
50
60
20
40
200 400 600 800
2431 F18b
10001000 300 500 700 900
C
REF
= 1µF, 10µF
C
REF
= 0.1µF
C
REF
= 0.01µF
V
CC
= 5V
V
REF
+
= 5V
V
REF
–
= GND
V
IN
+
= 1.25V
V
IN
–
= 3.75V
F
O
= GND
T
A
= 25°C
Figure 19. INL vs Differential Input Voltage (V
IN
= IN
+
– IN
–
)
and Reference Source Resistance (R
SOURCE
at REF
+
and REF
–
)
for Large C
REF
Values (C
REF
≥ 1µF)
V
INDIF
/V
REFDIF
–0.5
INL (ppm OF V
REF
)
3
9
15
0.3
2431 F19
–3
–9
0
6
12
–6
–12
–15
–0.3–0.4
–0.1–0.2
0.1 0.2 0.4
0
0.5
R
SOURCE
=
1k
R
SOURCE
=
10k
R
SOURCE
=
5k
V
CC
= 5V
V
REF
+
= 5V
V
REF
–
= GND
V
INCM
= 0.5(V
IN
+
+ V
IN
–
) = 2.5V
F
O
= GND
C
REF
= 10µF
T
A
= 25°C