Datasheet

LTC2440
14
2440fd
APPLICATIONS INFORMATION
Figure 4. SDI Speed/Resolution Programming
MSB
BIT 28 BIT 27 BIT 26 BIT 25 BIT 1 BIT 0
LSB
Hi-Z
2440 F04
SIG
BIT 29
“0”
BIT 30
EOC
Hi-Z
CS
SCK
SDI
SDO
BUSY
BIT 31
*OSR4 BIT MUST BE AT FIRST SCK RISING EDGE DURING SERIAL DATA OUT CYCLE
OSR4* OSR3 OSR2 OSR1 OSR0
Table 3. SDI Speed/Resolution Programming
OSR4 OSR3 OSR2 OSR1 OSR0
CONVERSION RATE
RMS
NOISE ENOB OSR
INTERNAL
9MHz CLOCK
EXTERNAL
10.24MHz CLOCK
X 0 0 0 1 3.52kHz 4kHz 23μV 17 64
X 0 0 1 0 1.76kHz 2kHz 3.5μV 20 128
0 0 0 0 0 880Hz 1kHz 2μV 21.3 256*
X 0 0 1 1 880Hz 1kHz 2μV 21.3 256
X 0 1 0 0 440Hz 500Hz 1.4μV 21.8 512
X 0 1 0 1 220Hz 250Hz V 22.4 1024
X 0 1 1 0 110Hz 125Hz 750nV 22.9 2048
X 0 1 1 1 55Hz 62.5Hz 510nV 23.4 4096
X 1 0 0 0 27.5Hz 31.25Hz 375nV 24 8192
X 1 0 0 1 13.75Hz 15.625Hz 250nV 24.4 16384
X 1 1 1 1 6.875Hz 7.8125Hz 200nV 24.6 32768**
**Address allows tying SDI HIGH *Additional address to allow tying SDI LOW
Table 4. LTC2440 Interface Timing Modes
Confi guration
SCK
Source
Conversion
Cycle
Control
Data
Output
Control
Connection
and
Waveforms
External SCK, Single Cycle Conversion External CS and SCK CS and SCK Figures 5, 6
External SCK, 2-Wire I/O External SCK SCK Figure 7
Internal SCK, Single Cycle Conversion Internal CS CS Figures 8, 9
Internal SCK, 2-Wire I/O, Continuous Conversion Internal Continuous Internal Figure 10