Datasheet

23
LTC1923
1923f
APPLICATIO S I FOR ATIO
WUUU
the total gate charges of the NMOS and PMOS on one side
of the bridge, and f is the oscillator frequency. The factor
of 2 arises from there being two sets of MOSFETs that
make up the full bridge. Note that increasing the switching
frequency will increase the dynamic current and therefore
power dissipation by the same factor. This power loss is
independent of TEC current.
Example: Q
N
= 10nC max, Q
P
= 15nC max, f = 225kHz,
V
DD
= 5V
Power loss = 2 • f • (Q
P
+ Q
N
) • V
DD
= 56mW
3) The DC resistances of the external bridge MOSFETs,
filter inductors and sense resistor are typically the domi-
nant loss mechanism at the high end TEC current. The
conduction path of the current includes one NMOS, one
PMOS, two inductors and the sense resistor so the DC
resistances associated with the components dissipate
power.
Example:
R
DS(ON)NMOS
at 5V = 0.055Ω max
R
DS(ON)PMOS
at 5V = 0.08Ω max
R
S
= 0.1Ω
R
L
= 0.1Ω,
I
TEC
= 1A
R
TEC
= 2.5Ω
Total series resistance = 0.055 + 0.08 + 2 • 0.1 + 0.1
= 0.435Ω
Power Loss = (1A)
2
• 0.435Ω = 0.435W
Output Power = (1A)
2
• 2.5Ω = 2.5W
This represents a 17% efficiency loss due to conduction
losses. The other two power loss mechanisms comprise
a little more than a 3% efficiency loss at this output power
level. This may sound alarming if electrical efficiency is the
primary concern and can be easily improved by choosing
lower R
DS(ON)
MOSFETs, lower series resistance induc-
tors and a smaller valued sense resistor. If temperature
rise is the primary concern, this power dissipation may be
acceptable. At higher current levels, this example does
illustrate that lower resistance components should be
selected.
Low Voltage Requirements
All components shown on the front page of this data sheet
will operate with a 2.7V input supply. Minor modifications
are required to guarantee correct operation. The voltage
on the REF input of the LTC2053 should be at least 1V
below V
DD
. Figure 14 shows how to implement this. By
dividing down the 2.5V reference with 500Ω of imped-
ance, feeding this to the REF input of the LTC2053 and the
integrating resistor of the LTC1923 error amplifier, any
common mode issues will be avoided.
REF
V
OUT
LTC1658
10k
NTC
A = 10
100k
1923 F14
4.7µF
10M
REF
10k
1µF
V
DD
2.7V TO 3.3V
CNTRL V
REF
V
DD
EAOUT
FB
V
SET
V
THRM
250Ω
250Ω
1µF
–
+
LTC2053
LTC1923GN
Figure 14. Low Input Supply Voltage Circuit